B(P)SCCO films were prepared on MgO substrate by a double cathode dc sputtering with a mosaic BiχSrCaCuyOz and (Bi0.7Pb0.3)χ SrCaCuyOz target. The films were deposited at 200 and 550, and then annealed. We have obtained the B(P)SCCO films with Tc of 90-100 K under the condition of the deposition at 550 and the in-situ annealing in 200 Torr O2 and the post-deposition annealing at 860.

A 2.4 GHz 0.13 µm CMOS transceiver LSI, supporting Bluetooth V2.1+enhanced data rate (EDR) standard, has achieved a high reception sensitivity and high-quality transmission signals between -40 and +90. A low-IF receiver and direct-conversion transmitter architecture are employed. A temperature compensated receiver chain including a low-noise amplifier accomplishes a sensitivity of -90 dBm at frequency shift keying modulation even in the worst environmental condition. Design optimization of phase noise in a local oscillator and linearity of a power amplifier improves transmission signals and enables them to meet Bluetooth radio specifications. Fabrication in scaled 0.13 µm CMOS and operation at a low supply voltage of 1.5 V result in small area and low power consumption.

This paper discusses a method of designing linear phase two-channel filter banks for integer wavelet transform. We show that the designed filter banks are easily structed as the lifting form by leading relationship between designed filters and lifting structure. The designed integer wavelets are applied to image compression to verify the efficiency of our method.

We have developed a high-efficiency charge-pump power supply circuit with large output current capability for mobile equipment. However, during the commercialization phase, we found that the large inrush current of 270 mA at charge-pump circuit startup-time could cause problems. In this paper we analyze the mechanism that causes this inrush current, and we propose circuitry to reduce it. We show SPICE simulation and measurement results for our proposed circuitry that confirm its effectiveness. By incorporating this circuitry, startup-time inrush current was reduced to 30 mA.

In many applications of digital video database systems such as digital library, video data is often compressed with MPEG video algorithms. It will be an important technique to insert the additional information data like indexes and contents effectively into video database which is compressed with MPEG, because we can always deal with the additional information with video data itself easily. We propose a method for inserting optional binary data such as index information of digital library into MPEG-1 and -2 bitstreams. The binary data inserted MPEG video bitstreams using our proposed scheme are also according to the specification of the MPEG video frame structure. The proposed method allows us to extract the inserted binary data perfectly though MPEG-1 and -2 video are lossy algorithms. And the quality of decoded images after extracting added information is almost the same as that of ordinary MPEG bitstreams. Furthermore, traditional standard MPEG-1 and -2 video decoder which can not extract inserted binary data can also decode images from the binary data inserted MPEG video bitstreams without obvious image degradation. There are some different points between the proposed insertion technique of the binary data and the watermarking technique. The technique of watermarking prepares to deal with alter watermarking by others. And the technique of watermarking is required for the identification of the signature and the perfect extraction of the inserted image signature is not required in the lossy MPEG video environment. On the other hand, we have to extract all of the inserted binary information data correctly with the insertion technique of the binary information. Simulations using MPEG video sequences with inserted binary data are presented to quantify some performance factors concerned. We have not heard about inserting data method which purpose is such as index and content information insertion.

We propose an efficient two-layer near-lossless coding method using an extended histogram packing technique with backward compatibility to the legacy JPEG standard. The JPEG XT, which is the international standard to compress HDR images, adopts a two-layer coding method for backward compatibility to the legacy JPEG standard. However, there are two problems with this two-layer coding method. One is that it does not exhibit better near-lossless performance than other methods for HDR image compression with single-layer structure. The other problem is that the determining the appropriate values of the coding parameters may be required for each input image to achieve good compression performance of near-lossless compression with the two-layer coding method of the JPEG XT. To solve these problems, we focus on a histogram-packing technique that takes into account the histogram sparseness of HDR images. We used zero-skip quantization, which is an extension of the histogram-packing technique proposed for lossless coding, for implementing the proposed near-lossless coding method. The experimental results indicate that the proposed method exhibits not only a better near-lossless compression performance than that of the two-layer coding method of the JPEG XT, but also there are no issue regarding the combination of parameter values without losing backward compatibility to the JPEG standard.

The numerical error of a sample Mahalanobis distance (T2=y'S-1y) with sample covariance matrix S is investigated. It is found that in order to suppress the numerical error of T2, the following conditions need to be satisfied. First, the reciprocal square root of the condition number of S should be larger than the relative error of calculating floating-point real-number variables. The second proposed condition is based on the relative error of the observed sample vector y in T2. If the relative error of y is larger than the relative error of the real-number variables, the former governs the numerical error of T2. Numerical experiments are conducted to show that the numerical error of T2 can be suppressed if the two above-mentioned conditions are satisfied.

We present analytical expression for inductance of a superconducting stripline, a strip sandwiched by two superconducting ground planes. In our method, we utilize the analytical formula for a perfect-conducting stripline derived by Chang in 1976. To utilize Chang's formula, we first transform the structure of a superconducting stripline into that of a perfect-conducting stripline by reducing the thicknesses of the superconducting layers. The thickness reduction is "λ coth (t/λ)" for each (upper or lower) side, where λ and t are the field penetration depth and the layer thickness, respectively. Then, we apply Chang's formula to the transformed stripline model. The calculated results are in good agreement with the numerical and experimental results.

This paper presents an ADPLL using a hierarchical TDC composed of a 4fLO DCO followed by a divide-by-4 circuit and three stages of known phase interpolators. We derived simple design requirements for ensuring precision of the phase interpolator. The proposed architecture provides immunity to PVT and local variations, which allows calibration-free operation, as well as sub-inverter delay resolution contributing to good in-band phase noise performance. Also the hierarchical TDC makes it possible to employ a selective activation scheme for power saving. Measured performances demonstrate the above advantages and the in-band phase noise reaches -104 dBc/Hz. It is fabricated in a 65 nm CMOS process and the active area is 0.18 mm2.

In this paper, we report the detailed investigation of novel printed disc monopole antennas for ultra-wideband (UWB) applications focusing on miniaturization of the disc radiator. First, the basic property was examined for the case of a circular disc with diameter of 50 mm, and it was found that the VSWR is less than 2 in the UWB band of 3.1-10.6 GHz when the feed gap length is between about -0.1 and 0.2 mm. Next, in order to reduce the size of the disc radiator, various dimensions of elliptical discs were investigated. It is shown that if the dimensions of the elliptical disc are chosen appropriately, a smaller disc size antenna can be achieved. To decrease the antenna size further, a triangular notch and an exponentially curved notch on the ground plane of the antenna were examined. It is observed that the use of the notched ground is very effective and that the diameter of the circular radiator can be reduced to 17 mm. The proposed antenna has an omnidirectional pattern in the x-y plane. The influence of the notch on the radiation pattern is very small. Details of the simulation results using the FDTD method and experimental results for the proposed antenna are presented and analyzed. These features are very attractive for UWB applications.

This paper proposes a new architecture for multibit complex bandpass ΔΣAD modulators with built-in Switched-Capacitor (SC) circuits for application to Low-IF receivers such as used for Bluetooth and WLAN. In the realization of complex bandpass ΔΣAD modulators, we face the following problems: (i) SNR of AD converter is deteriorated by mismatches between internal analog I and Q paths. (ii) Layout design becomes complicated because of signal lines crossing by complex filter and feedback from DAC for I and Q paths in the complex modulator, and this increases required chip area. We propose a new structure for a complex bandpass ΔΣAD modulator which can be completely divided into two paths without layout crossing, and solves the problems mentioned above. The two parts of signal paths and circuits in the modulator are changed for I and Q while CLK is changed for High/Low by adding multiplexers. Symmetric circuits are used for I and Q paths at a certain timing, and they are switched by multiplexers to those used for Q and I paths at another timing. Therefore the influence from mismatches between I and Q paths is reduced by dynamic matching. As a result, the modulator is divided into two separate parts without crossing signal lines between I and Q paths and its layout design can be greatly simplified compared with conventional modulators. We have conducted MATLAB simulations to confirm the effectiveness of the proposed structure.

We demonstrated 1-Tb/s-class transmissions of field-deployed large-core low-loss fiber links, which is compliant with ITU-T G.654.E, using our newly developed real-time transponder consisting of a state-of-the-art 16-nm complementary metal-oxide-semiconductor (CMOS) based digital signal processing application-specific integrated circuit (DSP-ASIC) and an indium phosphide (InP) based high-bandwidth coherent driver modulator (HB-CDM). In this field experiment, we have achieved record transmission distances of 1122km for net data-rate 1-Tb/s transmission with dual polarization-division multiplexed (PDM) 32 quadrature amplitude modulation (QAM) signals, and of 336.6 km for net data-rate 1.2-Tb/s transmission with dual PDM-64QAM signals. This is the first demonstration of applying hybrid erbium-doped fiber amplifier (EDFA) and backward-distributed Raman amplifier were applied to terrestrial G.654.E fiber links. We also confirmed the stability of signal performance over field fiber transmission in wavelength division multiplexed (WDM) condition. The Q-factor fluctuations respectively were only less than or equal to 0.052dB and 0.07dB for PDM-32QAM and PDM-64QAM signals within continuous measurements for 60 minutes.

In general, since the in-band noise of phase-locked loops (PLLs) is mainly caused by charge pumps (CPs), large-size transistors that occupy a large area are used to improve in-band noise of CPs. With the high demand for low phase noise in recent high-performance communication systems, the issue of the trade-off between occupied area and noise in conventional CPs has become significant. A noise-canceling CP circuit is presented in this paper to mitigate the trade-off between occupied area and noise. The proposed CP can achieve lower noise performance than conventional CPs by performing additional noise cancelation. According to the simulation results, the proposed CP can reduce the current noise to 57% with the same occupied area, or can reduce the occupied area to 22% compared with that of the conventional CPs at the same noise performance. We fabricated a prototype of the proposed CP embedded in a 28-GHz LC-PLL using a 16-nm FinFET process, and 1.2-dB improvement in single sideband integrated phase noise is achieved.

Over 100 Gbit/s/ch high-speed optical transmission is required to achieve the high capacity networks that can meet future demands. The coherent receiver, which is expected to yield high frequency utilization, is a promising means of achieving such high-speed transmission. However, it requires a high-speed Analog to Digital Converter (ADC) because the received signal bandwidth would be over several tens or hundreds of GHz. To solve this problem, we propose a band-divided receiver structure for wideband optical signals. In the receiver, received wideband signals are divided into a number of narrow band signals without any guard band. We develop a band-divided receiver prototype and evaluate it in an experiment. In addition, we develop a real-time OFDM demodulator on an FPGA board that implements 1.5 GS/s ADCs. We demonstrate that the band-divided receiver prototype with its real-time OFDM demodulator and 1.5 GS/s ADC can demodulate single polarization 12 Gbit/s OFDM signals in real-time.

This paper investigates approaches that can cancel nonlinear phase noise effectively for the phase-conjugate pair diversity transmission of 16-QAM WDM signals through multi-core fiber. The geometric mean is introduced for the combination of the phase-conjugate pair. A numerical simulation suggests that span-by-span chromatic dispersion compensation is more effective at cancelling phase noise in long distance transmission than lumped compensation at the receiver. Simulations suggest the span-wise compensation described herein yields Q-value enhancement of 7.8 and 6.8dB for CD values of 10 and 20.6ps/nm/km, respectively, whereas the lumped compensation equivalent attains only 3.5dB. A 1050km recirculating loop experiment confirmed a Q-value enhancement of 4.1dB for 20.6ps/nm/km, span-wise compensation transmission.

This paper devises a sophisticated approach to the performance estimation of an embedded hardware-software codesign system at the architecture level, which intends to optimize the hardware-software configuration in terms of processing time, power dissipation, and hardware cost. A distinctive feature of this approach consists in constructing a performance estimation model proper to each component of an embedded system, such as CPU core, RAM/ROM, cache memory, and application-specific hardware, by taking account of not only the functional performance but also the data transfer. The proposed estimation schemes are incorporated into an existing instruction set simulator, so that the actual performance can be estimated accurately at the architecture level. The experimental results demonstrate that the performance estimation approach enables the precise design decision at the architecture level, which greatly contributes toward enhancing the design ability dedicatedly for mobile appliances.

With the increasing number of crimes and accidents in which children are becoming involved, there is a growing demand for devices to safeguard children's security by detecting their locations on their way to and from school. This paper proposes a system that uses an IEEE802.15.4-standard network to detect children's locations. To overcome the susceptibility of radio interference from nearby wireless LANs, frequency division multiplexing is applied to this IEEE802.15.4-based network, toward improving data acquisition from terminal units. The effectiveness of the system was field-tested with elementary school students who used about 400 IEEE 802.15.4-compliant terminal units. An experiment verified that the use of frequency division multiplexing in an environment where radio interference by wireless LANs is strong allowed the network to double the success rate of information communication from terminal units relative to that without frequency division multiplexing. In the experiment for detecting elementary schoolers' arrival at and departure from school, the terminal detection rate was 99% and the terminal detection rate on the designated school routes was 90%. These results prove the effectiveness of the system in detecting locations.

This paper describes a blind frequency offset estimator (FOE) with wide frequency range for coherent quadrature amplitude modulation (QAM) receivers. The FOE combines a spectrum-based frequency offset estimation algorithm as a coarse estimator with a frequency offset estimation algorithm using the periodogram as a fine estimator. To establish our design methodology, each block of the FOE is rigorously analyzed by using formulas and the minimum fast Fourier transform (FFT) size that generates a frequency spectrum for both the coarse and fine estimators is determined. The coarse estimator's main feature is that all estimation processes are carried out in the frequency domain, which yields convergence more than five times faster than that of conventional estimators. The estimation frequency range of the entire FOE is more than 1.8 times wider than that of conventional FOEs. Experiments on coherent optical 64-ary QAM (64-QAM) reveal that frequency offset estimation can be achieved under a frequency offset value greater than the highest value of the conventional estimation range.

A novel optical high order quadrature amplitude modulation (QAM) transmission system for high-speed short links is described. Dual-polarization (DP) QAM and twin local lights are generated from one light source in the system, and these lightwaves are simultaneously transmitted via standard single mode fiber. The receiver can be constructed simply because it does not require a coherent light source under wavelength control. The system enables a 3.1 Gbaud DP-16-QAM signal to be successfully demodulated after 80-km transmission without using an optical dispersion compensator. It also achieves high tolerance against phase noise in the signal light source.