Electronics and automobiles were bound together by the introduction of emission regulations in the 1970's. The rapid progress of control technology and semiconductors that typify microcomputers has brought still closer relations between them. Without electronics, it would be impossible to realize features such as pursuit of comfort and environmental and safety measures which should be added to the automobile's fundamental features. In looking ahead to the future, the role of electronics in achieving electric automobiles and the ultimate goal of "automatic driving" is ever-increasing. Everyone knows that automobiles have become indispensable in our lives. In the future, the role of electronics will become increasingly important in order to evolve automobiles even further to allow harmonization with society.

The technical trends of intelligent vehicles are discussed basing on the progress of technology of microelectronics, sensing and information processing. The concept of intelligent vehicles has started when the installation of computers on vehicles became possible in 1970s. The functions of computerized cars increased gradually with the progress of technology of microelectronics, sensing and information processing responding to the demands of the society. The first issues we had to challenge with the capability of electronic systems were the environmental and the energy resources problems. The R & D works of these purposes created many sophisticated computer control systems. Moreover, these works established the base of intelligent vehicles that contains various functions for drivability, safety, and information communications. On the other hand, many kinds of information and communication technology became useful to solve the issues on automobiles through infrastructure systems. United States, Europe, and Japan have started their own projects to realize such hierarchy management systems for traffic and vehicles. From the viewpoint of vehicle itself, it is the indispensable conditions and directions to implement the computer and telecommunications functions to the vehicles to establish clean, comfort, convenient, efficient and safe automobiles toward the next century.

With the evolution of semiconductor technology, automotive electronics has made tremendous progress. The aim of automotive electronics is to improve the basic automotive functions of vehicles (running, turning, and stopping) from the standpoint of environmental protection, energy conservation, and transportation efficiency. This paper introduces the process of automotive electronics with an emphasis on major control systems such as engines and brakes. The role of ASICs in automotive control systems is also presented with actual examples of ASICs that are used in these systems.

This paper describes a vision system, which is based on ASIC (Application Specific Integrated Circuit) approaches, for vehicle guidance on highways. After reviewing related work in the field of intelligent vehicles, stereo vision, and ASIC-based approaches, the paper focuses on a stereo vision system developed for intelligent cruise control. The system measures the distance to the vehicle in front using trinocular triangulation. Application specific processor architectures were developed for low mass-production cost, real-time operation, low power consumption, and small physical size. The system was installed in a trunk of a car and evaluated successfully on highways.

It was more than 10 years ago that the first map navigation system, as an example of invehicle information system, has appeared in the market in Japan. Today's navigation system has been improved to the level that the latest system has 10 micro-processors, 7 MBytes of memories, and 4 GBytes of external data storage for map database. From the viewpoint of the automobile driver, there are still some problems with the system. Major problems in general are a lack of traffic information, better human interface, and a need for cost-reduction. The introduction of application specific ICs (ASICs) is expected to make systems smaller, costless, and give higher speed response. Today's in-vehicle information systems are reviewed function by function to discover what functions need to be implemented into ASICs for future systems, what ASICs will be required, and what technology has to be developed. It is concluded that more integration technology is expected including high parformance CPUs, large capacity memories, interface circuits, and some analog circuits such as DA converter. To develop this technology, some, major problems such as power consumption, number of input/output signals, as well as design aid and process technology are pointed out.

This paper describes our recent developments of ASICs for automotive multiplexing and data communications to implement in-vehicle networks. With the advancement of automotive electronics, there are ever growing needs for in-vehicle networks. One need is associated with solving the problem of an increasing number of electrical signal wires that inevitably accompany the increasing applications of automotive electronics. Another kind of need is concerned with sharing vehicle control data among several electronic control units such as engine, brake, suspension, and steering electronic control units to achieve an integrated vehicle control system for the purpose of obtaining higher performances in vehicle dynamics. In order to reduce the number of signal wires and share the control data, in-vehicle networks based on multiplexing and data communications are required. In this paper, two original communication protocols are presented to respectively cover low- and highi-speed multiplexing and data communications that are two most needed communication speed areas in our present and future automobiles. ASICs for the presented communication protoclos were designed and fabricated, using 2 µm COMS process. They have the chip size of 3.2 mm2.7 mm with 5,000 transistors and 6.9 mm4.9 mm with 18,000 transistors respectively for low- and high-speed multiplexing and data communications. An elaborate bus driver/receiver ASIC required for high-speed multiplexing and data communications was also designed and fabricated, using 35 V DC bipolar process. As one of its distinctive features, it can greatly suppress radio frequency noise radiated from a communication bus. It has the chip size of 4.8 mm3.8 mm that contains 570 device elements. The features of the protocols are given in detail with the descriptions of the developed ASICs.

A communication LSI Set for Automotive Body control systems such as power windows, power seats, and power doors based on an in-vehicle network have been developed. The main function of the LSI is to achieve an original automotive communication protocol. The LSI set makes it possible to build a new kind of automotive control system, and reduces the number of wiring harnesses and weight below those of the conventional automotive body electronics. The communications transmitters and receivers have been integrated on-chip, so the LSI needs several external discrete components such as resistors, capacitors, and diodes. This communications LSI offers the advantages of small size and high reliability of the electronic control unit based on an in-vehicle network.

The development of highly accurate and durable control system is becoming a must for todays high performance automobiles. For example, it is necessary to up-grade todays materials and methods creating more sensitive sensors, higher speed processors and more accurate actuators, while also being more durable. Thus, the development of a CMOS time-to-digital converter LSI with half-nanosecond resolution, which controls only pulse signals was achieved by employing 1.5 µm CMOS technology. The new signal detecting circuit, 1.1 mm² in size, converts time to numerical values over a wide measurement range (13 bits). The compact digital circuit employs a newly developed "ring gate delay system". Within the LSI the fully digital circuit is highly durable. This allows it to be utilized even under severe conditions (for example an operating ambient temperature of 130). In order to measure time accurately, a method of correcting the variation of measurement time data employing a real-time conversion fully digital circuit is described. This method allows for fully automatic correction with a microcomputer, so no manual adjustment is required. In addition to sensor circuit applications, the LSI has great potential for Application Specific Integrated Circuit, (ASIC) such as a function cell with is a completely new method of measuring time.

Fuzzy control is suitable for automotive control, because fuzzy control achieves controllability as good as control by humankind. However, since automotive control requires milli-second response and learning control, and the fuzzy system in automobiles requires fewer components (built-in type), a custom fuzzy inference LSI is needed for automotive control. We then indicated requirements of a fuzzy inference LSI suitable for automotive control and fabricated a fuzzy inference LSI using 1.5 µm CMOS process technique. This fabricated fuzzy LSI is designed to utilize in various automotive control experiments such as engine control, cruise control, brake control and steering control. The number of input variables is six, the number of output variables is two, the maximum number of production rules is 256, and the inference time is 63 microseconds (under the condition of six inputs, two outputs and 256 rules). The features of the fuzzy LSI are high speed inference, a built-in type, learning control ability and a memory structure separating into a rule memory and a membership function memory. A fuzzy control system is implemented only by the addition of two devices: the fuzzy LSI and an EPROM. The fuzzy LSI was applied to a rough road durability test aiming at the automatic driving equivalent to the human driver operation. In the test, fuzzy control and linear control were compared in terms of the compensation steering degrees. Linear steering control had a high rate of compensation steering of less than thirty degrees. On the other hand, the accumulated steering compensation of less than twenty degrees in the fuzzy control was about one third that in the linear control. The fuzzy steering control had the same steering compensations as that of human steering. The fuzzy LSI fabricated for various experiments is too large (10.7 mm10.9 mm) to adopt as automotive parts. Therefore, we studied a smaller-sized fuzzy LSI by limiting functions, by changing the parallel processing into sequential processing and by thinning out the memory data of input membership functions. The number of input variables is four, the number of output variables is two, the maximum number of production rules is 160 and the expected inference time is 140 micro-seconds (in the worst case). The obtained chip is small enough (4.8 mm4.8 mm) for automotive applications. Since the chip contains all the memories that are needed to execute fuzzy inference, the chip can be built in a microprocessor as a fuzzy inference co-processor without any other circuits.

When used for automotive applications, microcomputers have to meet two requirements more demanding than those for general use. One of these requirements is to respond to external events within a time scale of microseconds; the other is the high quality and high reliability necessary for the severe environmental operating conditions and the ambitious market requirements inherent to automotive applications. These needs especially the latter one have been responded to by further elaboration of each basic technology involved in semiconductor manufacturing. At the same time, various logic parts have been built into the microcomputer. This paper deals with several design approaches to the high quality and high reliability objective. First, testability improvement by the logical separation method focusing on the logic simulation model for generating test vectors, which enables us to reduce the time required for test vector development in half. Next, noise suppression methods to gain electromagnetic compatibility (EMC). Then, simplified memory transistor's analysis to evaluate the V/I-characteristics directly via external pins without opening the model seal, removing the passivation and placing a probe needle on the chip. Finally, increased reliability of on-chip EPROM using a special circuit raising the threshold value by approximately 1(V) compared to EPROM's without such a circuit.

Automotive electronics technology has become extremely advanced in the regions of automotive engine control, anti-skid brake control, and others. These control systems require highly advanced control performance and high speed microprocessors which can rapidly execute interrupt processing. Automotive engine control systems are now widely utilized in cars with high speed, high power engines. At present, it is generally acknowledged that such high performance engine control for the 10,000 rpm, 12 cylinder engines requires three or more conventional microprocessors. We fabricated an engine control system prototype incorporating the data-driven processor under development, which was installed in an actual automobile. In this paper, the characteristics of the engine control program and simulation results are firstly discussed. Secondly, the structure of the engine control system prototype and the control performance applied to the actual automobile are shown. Finally, from the results of software simulation and the installation of the engine control system prototype with the data-driven processor, we conclude that a single chip data-driven microprocessor can control a high speed, high power, 10,000 rpm, 12 cylinder automobile engine.

Since carelessness in driving causes a terrible traffic accident, it is an important subject for a vehicle to avoid collision autonomously. Real-time collision detection between a vehicle and obstacles will be a key target for the next-generation car electronics system. In collision detection, a large storage capacity is usually required to store the 3-D information on the obstacles lacated in a workspace. Moreover, high-computational power is essential not only in coordinate transformation but also in matching operation. In the proposed collision detection VLSI processor, the matching operation is drastically accelerated by using a Content-Addressable Memory (CAM) which evaluates the magnitude relationships between an input word and all the stored words in parallel. A new obstacle representation based on a union of rectangular solids is also used to reduce the obstacle memory capacity, so that the collision detection can be parformed only by parallel magnitude comparison. Parallel architecture using several identical processor elements (PEs) is employed to perform the coordinate transformation at high speed based on the COordinate Rotation DIgital Computation (CORDIC) algorithms. The collision detection time becomes 5.2 ms using 20 PEs and five CAMs with a 42-kbit capacity.

In order to develop silicon ICs operating up to above 450, Integrated Injection Logic (IIL) was chosen. A new structure for IIL was designed through experimental and theoretical studies of pn junctions, transistors, and IIL at high temperatures. A 5-µm design rule was used. The new IIL was fabricated by a specially developed combined process of ion implantation and low temperature epitaxy. The IIL was fully operational from room temperature to 454, and the output amplitude of a nine-stage ring oscillator was about 30 mV at 454. The minimum delay time of the IIL was 22 nsec at 454. The minimum power-delay product was 11 pJ and was one-third of that for IILs fabricated by 10-µm rule at 50.

We have developed new DMOS FET (DMOS) and intelligent power devices (IPD) specified for automotive load driving. Their features are extra-high surge immunity and low on-resistance. MOS power semiconductor devices are the most suitable for driving high speed and large current loads in future car electronics, but their high cost is the main obstacle preventing their implementation. To cut the total system cost, we have tried to enhance surge immunity of power semiconductor devices, at the same time reducing ON resistance, which enables us to omit external protection. Enhanced avalanche power dissipation also enables us to lower the breakdown voltage of the device, which also brings lower on-resistance. The drain to source avalanche immunity of vertical type DMOS (VDMOS) has been sharply improved by using the parasitic PN junction of the channel diffusion region as the cellular zener diode. Avalanche power dissipation energy per unit area of this durable DMOS is 10 to 100 times higher than that of conventional VDMOSs. Although the breakdown voltage of this device is only 30V, no external protection device is required in automotive applications. Several fault phenomena which might occur in this device are also described. Two types of IPDs are proposed in this paper. One is a durable and low-cost high-side switch IPD, whose enhanced surge immunity of IC section from V_DD line transient is verified by prototypes. Simplification of the fabrication process has also been achieved by lowering its breakdown voltage. The other is an extra-low on-resistance H-bridge IPD. Major on-resistance reduction of an output lateral type DMOS (LDMOS) is achieved because the cell-array structure is realized by applying 2-layer electrode technology to the power section. The on-resistance per unit area of this LDMOS is almost equal to that of VDMOSs in the same voltage class.

We have developed an SIMD processor on a double-height VME board. We achieved a good balance between cost and performance by combining four identical gate-array LSIs in the processor array with a 16-bit degital signal processor (DSP), standard dynamic random-access memories (DRAMs) and other peripherals. The gate-array LSIs have 168-bit processing elements (PEs), each containing a one-bit processing block and a serial multiplier. This PE structure offers high-level bit processing capability and peak performance of 512 million operations per second (MOPS) for 8-bit multiply and accumulate operations. Effective performance of more than 300 MOPS for 8-bit array data processing is achieved by using an LSI structure tuned to the DRAM access rate, although the processing speed is reduced by the DRAM access bottleneck. The LSIs also have two unique additional hardware structures that speed up various array data processes. One is an inter-PE routing register array for supporting a transmission, rotation and memory access path. The other is a tree-structure network for propagating operations among PEs. With these cost-effective structures, the SIMD processor is expected to be widely used for two-dimensional data processing, such as image processing and pattern recognition.

Two types of circuit architecture for GaAs LSI are described. The first circuit is named Stacked DCFL which has supply voltage compatibility with Si CMOS/BiCMOS and ECL operating on 3 V or 3.3 V. A divide by 128/129 prescaler IC has been developed to confirm the Stacked DCFL circuit operation. The second circuit is named SVFL which operates on single supply voltage by using Schottky FET characteristics in spite of normally-on FET logic. Both circuit architectures are based on the virtual ground concept. The transition time of 45 psec was obtained by the SVFL ring oscillator circuit fabricated with 1 µm gate length FET process, and the transition time of DCFL using the same process was from 80 psec to 100 psec. Stacked DCFL and SVFL are candidates for an internal gate and an input/output interface circuit for GaAs ASIC, respectively.

The potential distribution around a linear array of donor atoms in a semiconductor crystal is calculated, approximating the linear array by a continuous line charge. Two methods are used for the analysis. One is the self-consistent calculation of Poisson's equation and the effective mass Schrödinger's equation, and the other is the Thomas-Fermi approximation. Results of both methods agree very well, and it is shown that it is possible to form a potential distribution as fine as the electron wavelength by appropriate arrangement of the impurity atoms. Arrays of impurity atoms therefore can act as buiding elements for future electron wave devices.

A 10 GHz MMIC predistortion linearizer fabricated on a single chip is demonstrated for the first time. It employs less hybrid circuits compard with conventional devices, and is suitable for miniaturization. The total chip size of the fabricated MMIC is about 3.5 mm3.0 mm. The distortion reduction effect is examined using this linearizer. The improvement in IM₃ is more than 15 dB between 10.45 GHz and 10.70 GHz, and more than 8 dB between 10.05 GHz and 10.90 GHz.

Phase noise generation in varactor-tuned oscillators is analyzed by an asymptotic perturbation technique. It is found out that 1/f noise and AM noise are converted into phase noise by first- and higher-order nonlinearities of the varactor. The deduced formula can be utilized in CAD for circuit evaluation/optimization of varactor-tuned osicillators.