YBa2Cu3Ox films were grown on MgO(100) substrates by liquid phase epitaxy. Their structural and electrical properties were examined. From TEM plan-view images, it is found that the film consists of large grains whose misorientation angles are less than 1. Although the DC critical current density values decrease with increasing the film thickness, the critical current density value of 9. 3105 A/cm2 at 77 K is obtained for a 7 µm-thick film. A microstrip resonator at 10. 8 GHz with a YBCO ground plane shows Q0 values of 14200 at 77 K and 23300 at 40 K, which correspond to surface resistance values of 650 and 400 µΩ, respectively. By using a microstrip line resonator with a Ti/Au ground plane, the critical field of the film at 77 K and 10. 8 GHz is estimated to be 30 Oe. The third-order intercept of the resonator with the Ti/Au ground plane is the input power of +43 dBm and the output power of +30 dBm at 77 K.

The small planar packaging (SPP) system described here can be combined with card-on-board (COB) packaging in high-speed asynchronous transfer mode (ATM) switching systems with throughput of over 40-Gb/s. The SPP system provides high I/O pin count density, high packaging density and high cooling capability. Prototype SPP system with air flow control structure for switching MCMs is constructed. Each MCM contained a 35 array of low thermal resistance butt-lead pin-grid-array on a glass ceramic substrate measuring 100170 mm with a plate fin heat-sink. This allows a power dissipation of more than 125 W per MCM, and 300 W per printed circuit board (PCB). Obtained board level heat flux density of the SPP system is 0. 37 W/cm2, which is six times that of conventional COB packaging. The SPP system combined with the COB packaging provides a small system foot-print and compact hardware for high-speed, large capacity ATM switching systems. This high-performance air cooling technology will be especially useful for future broadband ISDN high-speed switching systems.

A series of transparent photochemical acid-generators (PAGs) has been successfully prepared and investigated to apply ArF excimer-laser lithography. These PAGs were synthesized as new alkylsulfonium salts that have cycloalkyl groups but no aromatic ones. They were almost transparent at 193. 4 nm and have high acid-generation efficiency enough to use for ArF excimer-laser resists. The photochemical reaction of these alkylsulfonium salts occurs mainly due to the S-C bond fission. A resist utilizing the PAGs was capable to resolve a 0. 2µm L/S pattern at a 50-mJ/cm2 dose with an aqueous alkaline developer. These PAGs are promising materials for use in ArF excimer-laser lithography.

We have improved the optical beam induced resistance change (OBIRCH) system so as to detect (1) a current path as small as 10-50 µA from the rear side of a chip, (2) current paths in silicide lines as narrow as 0. 2 µm, (3) high-resistance Ti-depleted polysilicon regions in 0. 2 µm wide silicide lines, and (4) high-resistance amorphous thin layers as thin as a few nanometers at the bottoms of vias. All detections were possible even in observation areas as wide as 5 mm 5 mm. The physical causes of these detections were characterized by focused ion beam and transmission electron microscopy.

We present a realization of the transparent wave absorber effective for the use at V-band frequency. First, we propose a structure of the transparent wave absorber consisting of spacer (polycarbonate) and two transparent resistive sheet (polyethylene terephtalate deposited with Indium Tin Oxide) used as a reflection film and an absorption film. Second, a design chart for this type of wave absorber is shown. Third, a design method and manufacturing process of the transparent wave absorber are described particularly for V-band frequency. As a result, the measurement of reflection loss of the absorber indicate that a peak absorption of 32-38 dB is attained at a target frequency of 60 GHz.

The exact expected test lengths of pseudo-random patterns that are generated by LFSRs are theoretically analyzed for a CUT containing hard random-pattern-resistant faults. The exact expected test lengths are also analyzed when more than one primitive polynomials are selected.

As MOSFET sizes and wire widths become very small in recent years, influence of resistive component of interconnects on the estimation of propagation delay and power dissipation can no longer be neglected. In this paper we present formulas of output waveform at driving point and short-circuit power dissipation for static CMOS logic gates driving a CRC π load. By representing the short-circuit current and the current flowing in the resistance of a CRC π load by piece-wise linear functions, a closed-form formula is derived. On the gate delay the error of our formula is less than 8% from SPICE in our experiments. These formulas will contribute to faster estimation of circuit speed and power dissipation of VLSI chips on timing level simulators.

We developed a glass ferrule fiber optic connector. During development, we also studied wear-resistant coating technology for preventing scratches on the surface of a glass ferrule. The method of coating was sputtering, and the material was alumina. We confirmed that a thin uniform coating could be formed on the ferrule surface to improve the durability of glass ferrule connectors.

On account of its superior electrical contact performance, Ag (40wt%)-Pd(60wt%) alloy has been widely used to the electrical contacts of electromechanical devices. However, regarding small devices, some important difficulties arise due to the small size such as the degradation of the contact resistance caused by the oxide film grown on the surface. To solve these problems, it was reported previously that doping Mg and Cr into the Ag-Pd alloy was tried to improve the oxide film. As a result, the oxide film grown on the Ag-Pd-Mg surface exhibited a remarkably low contact resistance. However, for the oxide film on Ag-Pd-Cr, no improvement of the contact resistance was observed. In this study, to clarify the cause of the low contact resistance for Ag-Pd-Mg, the effect of the doping with a third element on the composition and formation of the oxide film was analyzed using electron diffractometry, XPS and STM. As a result, Ag was found to be distributed on the outermost surface and inside the oxide film formed on Ag-Pd-Mg. However, Ag was not found on the surface of and inside the oxide film formed on Ag-Pd-Cr. Therefore, it was concluded that the presence of Ag on the surface of and inside the oxide film reduces the resistivity of the film.

The alloy of Ag (40wt%)-Pd(60wt%) has been used in the electrical contacts of electromechanical devices due to its superior contact properties. There is currently, an increasing trend to decrease the size of electromechanical devices. However, it has been difficult to obtain a high contact force and the high restoring force of contacts, and these problems cause contact failures such as high contact resistance. In response to this problem, the alloy is overlaid with an Au layer which is not affected by oxide films. However, when the contacts are subjected to an unacceptable amount of mechanical shock, adhesion of the Au overlay occurs easily. In order to solve these difficulties, it can be proposed to cover the contact surface with high electric conductive oxide films. With this concept, the Au overlay should be unnecessary. In the present study, to reduce the high contact resistance of the Ag-Pd alloy contaminated with an oxide film, very small amounts of Mg and Cr were used in separate doping trials to the alloy. The improvement of contact resistance characteristics is the focus of the present study. Specimens of Ag (40wt%)-Pd(60wt%), Ag-Pd-Mg(0.1, 0.5 and 1.0wt%), and Ag-Pd-Cr(0.1 and 0.5wt%) were oxidized at elevated temperatures to accelerate the process of oxidation, and the growth kinetic law of oxide films grown on the surfaces were evaluated by ellipsometry. The effect of the oxide film on the contact resistance characteristics were then clarified. A marked improvement of the contact resistance caused by the oxide film was found for the Ag-Pd alloy with a Mg doping agent. However, for the Cr doping agent, a low contact resistance was not obtained as same as the Ag-Pd alloy itself.

Arc and contact resistance characteristics of Ag and Pd contacts were determined in several kinds of dielectric liquids, such as distilled water, methanol and n-hexane, under the inductive load condition. The experimental results showed that arc discharge types are dependent on dielectric liquids. A steady arc develops in air under this test condition. However, it was found that not the steady arc but the showering arc occurs in distilled water and methanol at a low load current. It was demonstrated that this phenomenon is caused by the high capacitance generated by the ambient dielectric liquid. Also, in almost all cases, the contact resistance behavior in dielectric liquids is satisfactory because metal spots remain on the contact surface. However, in n-hexane, the contact resistance tends to deteriorate, particularly for the Ag contact, with increasing load current. It seems that the deterioration of contact resistance is caused by carbon included in n-hexane.

Effects of organic gases (1, 4-butanediol, n-hexane, phenol, and benzene) on the contact resistance (the electrical life and the mechanical life) and the sticking were evaluated. These effects were evaluated by using telecommunication relays from which the cases were removed. Contact materials were Au90Ag10(clad)/Ag40Pd60 (base). Test conditions were as follows: In the cases of the electrical life test and the mechanical life test: Load conditions: DC28 V, 100 mA and 0 V, 0 mA. Temperature: 85. Frequency: 5 Hz. Number of operations: 2,500,000 times. In the case of the sticking test: Load condition: DC96 V, 140 mA. Temperature: 50. Frequency: 5 Hz. Number of operations: 2,000,000 times. It was found that the electrical life was more than 2,500,000 times, the mechanical life was more than 2,500,000 times, and the sticking didnt occur in the case of 1, 4-butanediol. The electrical life was improved by adding 1, 4-butanediol to phenol and benzene, respectively.

A non-isothermal device simulation, consisting of solving heat flow equation three-dimensionally together with other semiconductor equations two-dimensionally, is reported for various arrangements of a pluralty of transistors mounted on a single chip. These arrangements are intended to simulate the real situation in an IC chip whereas a three-dimensional solution of the heat flow equation is aimed at accurately determining the thermal interdependence among individual transistors. As a result, the drain current versus drain voltage characteristics of a miniaturized transistor is found to exhibit a heat-induced negative resistance region.

A series of CoxAg1-x (0x100at.%) granular films were prepared using the ion-beam cosputtering technique at different substrate temperatures. Systematic investigations have been carried out on the giant magnetoresistance (GMR) effect and characterization of microstructures of these samples. The magnetoresistance ratio depends strongly on cobalt concentration, substrate temperature, and annealing treatment. The optimal value of GMR was observed in Co22Ag78 sample prepared at the temperature of 300 K. Microstructures of as-deposited and annealed samples were characterized by structural analyses. For Co22Ag78 sample, real-time in situ observation by TEM together with FMR spectra indicates that the size and shape of cobalt granules evolve primarily along the film plane during annealing. The results of FMR also provide that the cobalt granules remain single-domain particles after annealing at temperatures up to 700 K.

New functional surface tunnel transistors (STTs) with multiple interband-tunnel-junctions in a symmetric source-to-drain structure are proposed to reduce the number of fabrication steps and to increase functionality. These devices have p+/n+ interband tunnel junctions in series between a p+ source and a p+ drain through n+ channels. We successfully fabricated GaAs-based multiple-junction STTs (MJ-STTs) using molecular-beam epitaxy regrowth. This fabrication method eliminates the need for two of the photo-masks in the conventional process for asymmetric planar STTs. In the preliminary experiments using multiple-junction p+/n+ diodes, we found that the peak-voltage increment in negative-differential-resistance (NDR) characteristics due to the reverse-biased tunnel junction in negligible, while the first-peak voltage is roughly proportional to the number of forward-biased tunnel junctions. Moreover, the number of NDR characteristics are completely determined by the number of tunnel junctions. The fabricated STTs with multiple junctions, up to eight junctions, exhibited clear transistor operation with multiple NDR characteristics, which were symmetric with the drain bias. These results indicate that any number of gate-controlled NDR characteristics can be realized in MJ-STTs by using an appropriate number of tunnel junctions in series. In addition, as an example of a functional circuit using MJ-STTs, we implemented a tri-stable circuit with a four-junction STT and a load resistor connected in series. The tri-stable operation was confirmed by applying a combination of a reset pulse and a set pulse for each stable point.

A V-band compact monolithic up-converter and down-converter were designed and tested. Each frequency converter was highly integrated with RF and LO amplifiers into a single compact chip. To avoid undesirable resonance, the chip width was limited to 0.9 mm. The up-converter has a balanced configuration to suppress undesired LO leakage. Using the uniplanar concept, the chip size of each frequency converter was greatly reduced to only 2.6 mm2. Measured performance of the up-converter includes conversion gain of-10.6 dB3.3 dB for a bandwidth of 10 GHz, and LO leakage is more than 10 dB below LO input. The down-converter shows a conversion gain of -0.4 dB2.0 dB.

A 3V-50 MHz analog CMOS current-mode continuous-time active filter with a negative resistance load (NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. The inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5 µm CMOS n-well process. Simulation result shows the cutoff frequency of 50 MHz and power consumption of 2.4mW/pole with a 3V power supply.

This paper presents the device technology for monolithic integration of InP-based resonant tunneling diodes (RTDs) and high electron mobility transistors (HEMTs). The potential of this technology for applications in quantum functional devices and circuits is demonstrated in two integration schemes in which RTDs and FETs are integrated either in Parallel or in series. Based on the parallel integration scheme, we demonstrate an integrated device which exhibits negative differential resistance and modulated peak current. This integrated device forms the foundation of a new category of functional circuits featuring clocked supply voltage. Based on the series integration scheme, resonant-tunneling high electron mobility transistors (RTHEMTs) with novel current-voltage characteristics and useful circuit applications are demonstrated. The high-frequency characteristics of RTHEMTs are also reported.

This paper describes a circuit analysis technique that includes all circuit elements used in transistor Colpitts quartz crystal oscillators. This technique is applied to a quartz crystal oscillator that has a tank circuit for selecting the oscillation frequency. The results obtained with this technique are compared with SPICE simulation results. Good agreement in the results clearly shows the validity of our technique.

We analyzed the operation speed of the resonant tunneling logic gate, MOBILE, using a simple equivalent circuit model and varying parameters of I-V characteristics and capacitance of RTTs(resonant tunneling transistors). The switching time for large peak-to-valley(P/V)current ratios is smaller at small Vbmax(maximum bias voltage), but larger at large Vbmax than that for small P/V ratios in the case of present I-V characteristics with flat valley current. It is also demonstrated that the MOBILE operation fails if the bias voltage rises too fast, when the capacitance of the load and the driver is different due to the displacement current through the capacitance. These behaviors can be explained by considering the potential diagrams of the circuit.