The method of extracting impedance parameters of surface mounted (SMD) electronic components by test is suitable for components with unknown model or material information, but requires consideration of errors caused by non-coaxial and measurement fixtures. In this paper, a fixture for impedance measurement is designed according to the characteristics of passive devices, and the fixture de-embedding method is used to eliminate errors and improve the test accuracy. The method of obtaining S parameters of fixture based on full wave simulation proposed in this paper can provide a thought for obtaining S parameters in de-embedding. Taking a certain patch capacitor as an example, the S parameters for de-embedding were obtained using methods based on full wave simulation, 2×Thru, and ADS simulation, and de-embedding tests were conducted. The results indicate that obtaining the S parameter of the testing fixture based on full wave simulation and conducting de-embedding testing compared to ADS simulation can accurately extract the impedance parameters of SMD electronic components, which provides a reference for the study of electromagnetic interference (EMI) coupling mechanism.

This paper proposes a determination method of the cascaded number for lumped parameter models (LPMs) of the transmission lines. The LPM is used to simulate long-distance transmission lines, and the cascaded number significantly impacts the simulation results. Currently, there is a lack of a system-level determination method of the cascaded number for LPMs. Based on the theoretical analysis and eigenvalue decomposition of network matrix, this paper discusses the error in resonance characteristics between distributed parameter model and LPMs. Moreover, it is deduced that optimal cascaded numbers of the cascaded π-type and T-type LPMs are the same, and the Γ-type LPM has a lowest analog accuracy. The principle that the maximum simulation frequency is less than the first resonance frequency of each segment is presented. According to the principle, optimal cascaded numbers of cascaded π-type, T-type, and Γ-type LPMs are obtained. The effectiveness of the proposed determination method is verified by simulation.

This paper formulates a class-E synchronous RF rectifier from a new viewpoint. The key point is to introduce a matrix and convolute the DC terms into RF matrices. The explicit expression of input impedance is demonstrated in plane geometry. We find out their input impedance exhibits a geodesic arc in hyperbolic geometry under ZVS operation, where the theoretical RF-DC conversion efficiency results in 100%. We verify the developed theory both numerically (circuit simulation) and experimentally (6.78MHz, 100W). We confirm that the input impedance becomes a geodesic arc for a wide range of DC load resistance. The presented theory is quite elegant since it is based on a matrix-based formulation and plane-geometrical expression.

This paper proposes a novel quad-band branched monopole antenna with a filter. The proposed antenna has a simple configuration in which branch-elements are added to a basic configuration consisting of a mast and dielectric wires. The antenna is characterized by performances such as wideband impedance matching, gain stabilization, and gain enhancement. Wideband impedance characteristics satisfying the voltage standing ratio of less than 2 are obtained by exciting a parallel resonance at the lowest band and multi-resonance at high bands. The filter suppressing higher order modes is used for gain stabilization, so that averaged gains above 5dBi are obtained at the quad-band. The antenna has a high gain of 11.1dBi because the branch-elements work as an end-fire array antenna at the highest band. Furthermore, it is clarified that an operating frequency is switched by using a variable bandpass filter at the lowest band. Last, a scale model of the antenna is fabricated and measured, then the effectiveness of the proposed antenna is demonstrated.

We observed dynamical carrier motion in an OLED device under an external reverse bias application using ExTDR measurement. The rectangular wave pulses were used in our ExTDR to observe the transient impedance of the OLED sample. The falling edge of the transmission waveform reflects the transient impedance after applying pulse voltage during the pulse width. The observed pulse width variation at the falling edge waveform indicates that the frontline of the hole distribution in the hole transport layer was forced to move backward to the ITO electrode.

This study proposes a new structure of a single-shunt rectifier circuit that can reduce circuit loss and improve efficiency over the conventional structure. The proposed structure can provide impedance matching to the measurement system (or receiving antenna) without the use of conventional matching circuits, such as stubs and tapers. The proposed structure can simultaneously perform full-wave rectification and impedance matching by placing a feeding point on the output filter's λ/4 transmission line. We use circuit simulation to compare the RF-DC conversion efficiency and circuit loss of the conventional and proposed structures. The simulation results show that the proposed structure has lower circuit loss and higher RF-DC conversion efficiency than the conventional structure. We fabricate the proposed rectifier circuit using a GaAs Schottky barrier diode. The simulation and measurement results show that the single-shunt rectifier circuit's proposed structure is capable of rectification and impedance matching. The fabricated rectifier circuit's RF-DC conversion efficiency reaches a maximum of 91.0%. This RF-DC conversion efficiency is a world record for 920-MHz band rectifier circuits.

This paper proposes a topology of high power, MHz-frequency, half-bridge resonant inverter ideal for low-loss Gallium Nitride high electron mobility transistor (GaN-HEMT). General GaN-HEMTs have drawback of low drain-source breakdown voltage. This property has prevented conventional high-frequency series resonant inverters from delivering high power to high resistance loads such as 50Ω, which is typically used in radio frequency (RF) systems. High resistance load causes hard-switching also and reduction of power efficiency. The proposed topology overcomes these difficulties by utilizing a proposed ‘L-S network’. This network is effective combination of a simple impedance converter and a series resonator. The proposed topology provides not only high power for high resistance load but also arbitrary design of output wattage depending on impedance conversion design. In addition, the current through the series resonator is low in the L-S network. Hence, this series resonator can be designed specifically for harmonic suppression with relatively high quality-factor and zero reactance. Low-distortion sinusoidal 3kW output is verified in the proposed inverter at 13.56MHz by computer simulations. Further, 99.4% high efficiency is achieved in the power circuit in 471W experimental prototype.

This paper presents a fully integrated yet compact receiver front-end for Sub-GHz applications such as Internet-of-Things (IoT). The low noise amplifier (LNA) matching network leverages an inductance boosting technique. A relatively small on-chip inductor with a compact area achieves impedance matching in such a low frequency. Moreover, a passive-mixer-first mode bypasses the LNA to extend the receiver dynamic-range. The passive mixer provides matching to the 50Ω antenna interface to eliminate the need for additional passive components. Therefore, the receiver can be fully-integrated without any off-chip matching components. The flipped-voltage-follower (FVF) cell is adopted in the low pass filter (LPF) and the variable gain amplifier (VGA) for its high linearity and low power consumption. Fabricated in 65nm LP CMOS process, the proposed receiver front-end occupies 0.37mm2 core area, with a tolerable input power ranging from -91.5dBm to -1dBm for 500kbps GMSK signal at 924MHz frequency. The power consumption is 1mW power under a 1.2V supply.

This paper theoretically presents that a terahertz (THz) oscillator using a resonant tunneling diode (RTD) and a rectangular cavity, which has previously been proposed, can radiate high output power by the impedance matching between RTD and load through metal-insulator-metal (MIM) capacitors. Based on an established equivalent-circuit model, an equation for output power has been deduced. By changing MIM capacitors, a matching point can be derived for various sizes of rectangular-cavity resonator. Simulation results show that high output power is possible by long cavity. For example, a high output power of 5 mW is expected at 1 THz.

This study proposes a design method for a rectifier circuit that can be rapidly charged by focusing on the design-load value of the circuit and the load fluctuation of a storage capacitor. The design-load value is suitable for rapidly charging the capacitor. It can be obtained at the lowest reflection condition and estimated according to the circuit design. This is a conventional method for designing the rectifier circuit using the optimum load. First, we designed rectifier circuits for the following three cases. The first circuit design uses a load set to 10 kΩ. The second design uses a load of 30 kΩ that is larger than the optimum load. The third design utilizes a load of 3 kΩ. Then, we measure the charging time to design the capacitor on each circuit. Consequently, the results show that the charge time could be shortened by employing the design-load value lower than that used in the conventional design. Finally, we discuss herein whether this design method can be applied regardless of the rectifier circuit topology.

Aluminum Electrolytic Capacitors are widely used as the smoothing capacitors in power converter circuits. Recently, there are a lot of studies to detect the residual life of the smoothing Aluminum Electrolytic Capacitors from the information of the operational circuit, such as the ripple voltage and the ripple current of the smoothing capacitor. To develop this kind of technology, more precise impedance models of Aluminum Electrolytic Capacitors become desired. In the case of the low-temperature operation of the power converters, e.g., photovoltaic inverters, the impedance of the smoothing Aluminum Electrolytic Capacitor is the key to avoid the switching element failure due to the switching surge. In this paper, we introduce the impedance calculation model of Aluminum Electrolytic Capacitors, which provides accurate impedance values in wide temperature and frequency ranges.

In this paper, a balance operation Transimpedance Amplifier (TIA) with low-noise has been implemented for optical receivers in 130 nm SiGe BiCMOS Technology, in which the optimal tradeoff emitter current density and the location of high-frequency noise corner were analyzed for acquiring low-noise performance. The Auto-Zero Feedback Loop (AZFL) without introducing unnecessary noises at input of the TIA, the tail current sink with high symmetries and the balance operation TIA with the shared output of Operational Amplifier (OpAmp) in AZFL were designed to keep balanced operation for the TIA. Moreover, cascode and shunt-feedback were also employed to expanding bandwidth and decreasing input referred noise. Besides, the formula for calculating high-frequency noise corner in Heterojunction Bipolar Transistor (HBT) TIA with shunt-feedback was derived. The electrical measurement was performed to validate the notions described in this work, appearing 9.6 pA/√Hz of input referred noise current Power Spectral Density (PSD), balance operation (VIN1=896mV, VIN2=896mV, VOUT1=1.978V, VOUT2=1.979V), bandwidth of 32GHz, overall transimpedance gain of 68.6dBΩ, a total 117mW power consumption and chip area of 484µm × 486µm.

The impedance expansion method (IEM) is a circuit-modeling technique for electrically small devices based on the method of moments. In a previous study, a circuit model of a wireless power transfer (WPT) system was developed by utilizing the IEM and eigenmode analysis. However, this technique assumes that all the coupling elements (e.g., feeding loops and resonant coils) are in the absence of neighboring scatters (e.g., bodies of vehicles). This study extends the theory of the IEM to obtain the circuit model of a WPT system in the vicinity of a perfectly conducting scatterer (PCS). The numerical results show that the proposed method can be applied to the frequencies at which the dimension of the PCS is less than approximately a quarter wavelength. In addition, the yielded circuit model is found to be valid at the operating frequency band.

This paper discusses and elaborates an analytical model of a multi-stage switched-capacitor (SC) voltage boost converter (VBC) for low-voltage and low-power energy harvesting systems, because the output impedance of the VBC, which is derived from the analytical model, plays an important role in the VBC's performance. In our proposed method, we focus on currents flowing into input and output terminals of each stage and model the VBCs using switching frequency f, charge transfer capacitance CF, load capacitance CL, and process dependent parasitic capacitance's parameter k. A comparison between simulated and calculated results showed that our model can estimate the output impedance of the VBC accurately. Our model is useful for comparing the relative merits of different types of multi-stage SC VBCs. Moreover, we demonstrate the performance of a prototype SC VBC and energy harvesting system using the SC VBC to show the effectiveness and feasibility of our proposed design guideline.

This paper presents a design of CMOS transimpedance amplifier (TIA) and peaking inductor for high speed, low power and small area. To realize high density integration of optical I/O, area reduction is an important figure as well as bandwidth, power and so on. To determine design parameters of multi-stage inverter-type TIA (INV-TIA) with peaking inductors, we derive a simplified model of the bandwidth and the energy per bit. Multi-layered on-chip inductors are designed for area-effective inductive peaking. A 5-stage INV-TIA with 3 peaking inductors is fabricated in a 65-nm CMOS. By using multi-layered inductors, 0.02 mm2 area is achieved. Measurement results show 45 Gb/s operation with 49 dBΩ transimpedance gain and 4.4 mW power consumption. The TIA achieves 98 fJ/bit energy efficiency.

Chipless tag systems composed of multimode stepped impedance resonators (SIRs) and a reader based on near-field electromagnetic coupling have been reported. This resonator structure has advantages including a simple design due to its symmetrical structure and good discrimination accuracy because many higher-order mode resonant frequencies can be used for identification of codes. However, in addition to the disadvantage of long resonator length, the frequency response in the tag system becomes unstable due to deterioration of the isolation between the probes because the same probe structure is used for the excitor and detector. In this paper, we propose two methods to solve these problems. One is to adopt an asymmetrical SIR structure with a short-circuited end and open-circuited end, which reduces the resonator length by half while allowing the same number of codes to be generated. The other is to improve isolation between probes by applying different magnetic field and electric field structures to the two probes for excitation and detection. We also examined assignment and identification conditions and clarified that the available number of codes for a unit tag can be more than 15 bits. It becomes clear that a 75-bit chipless tag on a credit card-sized (55×86mm) printed circuit board can be designed by integrating five unit tags.

This paper presents a methodology with which to construct an equivalent simulation model of closed-loop BCI testing for a vehicle component. The proposed model comprehensively takes the transfer impedance of the test configuration into account. The methodology used in this paper relies on circuit modeling and EM modeling as well. The BCI test probes are modeled as the equivalent circuits, and the frequency-dependent losses characteristics in the probe's ferrite are derived using a PSO algorithm. The measurement environments involving the harness cable, load simulator, DUT, and ground plane are designed through three-dimensional EM simulation. The developed circuit model and EM model are completely integrated in a commercial EM simulation tool, EMC Studio of EMCoS Ltd. The simulated results are validated through comparison with measurements. The simulated and measurement results are consistent in the range of 1MHz up to 400MHz.

A methodology for obtaining semi-custom high-power amplifiers (HPAs) is described. The semi-custom concept pertains to the notion that a selectable output power is attainable by replacing only transistors. To compensate for the mismatch loss, a new output matching network that can be easily tuned by wiring is proposed. Design equations were derived to determine the circuit parameters and specify the bandwidth limitations. To verify this methodology, a semi-custom HPA with GaN HEMTs was fabricated in the S-band. A selectable output power from 240 to 150 W was successfully achieved while maintaining a PAE of over 50% in a 19% relative bandwidth.

In order to achieve an antenna with robustness to metal for closed space wireless communications, two types of the folded monopole antenna with different input impedance have been studied. In this study, we propose the folded monopole antenna, which can switch the input impedance by a simple method. Both simulated and measured results show that the proposed antenna can improve robustness to the proximity of the metal.

We present a novel burst-mode transimpedance amplifier (TIA) with a gain-mode switching. The proposed TIA utilizes a regulated-cascode (RGC) input stage for broadband characteristics. To expand a dynamic range, the RGC controls a linear operating range depending on transimpedance gains by adjusting bias conditions. This TIA is implemented using the 0.18μm-CMOS technology. The experimental results show that the proposed TIA IC has a good eye-opening and can respond quickly to the burst data.