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  • A Narrowband Active Noise Control System with a Frequency Estimator

    Lei WANG  Kean CHEN  Jian XU  

     
    PAPER-Noise and Vibration

      Pubricized:
    2021/03/17
      Vol:
    E104-A No:9
      Page(s):
    1284-1292

    A narrowband active noise control (NANC) system is very effective for controlling low-frequency periodic noise. A frequency mismatch (FM) with the reference signal will degrade the performance or even cause the system to diverge. To deal with an FM and obtain an accurate reference signal, NANC systems often employ a frequency estimator. Combining an autoregressive predictive filter with a variable step size (VSS) all-pass-based lattice adaptive notch filter (ANF), a new frequency estimation method is proposed that does not require prior information of the primary signal, and the convergence characteristics are much improved. Simulation results show that the designed frequency estimator has a higher accuracy than the conventional algorithm. Finally, hardware experiments are carried out to verify the noise reduction effect.

  • Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation

    Shuichi NAGASAWA  Masamitsu TANAKA  Naoki TAKEUCHI  Yuki YAMANASHI  Shigeyuki MIYAJIMA  Fumihiro CHINA  Taiki YAMAE  Koki YAMAZAKI  Yuta SOMEI  Naonori SEGA  Yoshinao MIZUGAKI  Hiroaki MYOREN  Hirotaka TERAI  Mutsuo HIDAKA  Nobuyuki YOSHIKAWA  Akira FUJIMAKI  

     
    PAPER

      Pubricized:
    2021/03/17
      Vol:
    E104-C No:9
      Page(s):
    435-445

    We developed a Nb 4-layer process for fabricating superconducting integrated circuits that involves using caldera planarization to increase the flexibility and reliability of the fabrication process. We call this process the planarized high-speed standard process (PHSTP). Planarization enables us to flexibly adjust most of the Nb and SiO2 film thicknesses; we can select reduced film thicknesses to obtain larger mutual coupling depending on the application. It also reduces the risk of intra-layer shorts due to etching residues at the step-edge regions. We describe the detailed process flows of the planarization for the Josephson junction layer and the evaluation of devices fabricated with PHSTP. The results indicated no short defects or degradation in junction characteristics and good agreement between designed and measured inductances and resistances. We also developed single-flux-quantum (SFQ) and adiabatic quantum-flux-parametron (AQFP) logic cell libraries and tested circuits fabricated with PHSTP. We found that the designed circuits operated correctly. The SFQ shift-registers fabricated using PHSTP showed a high yield. Numerical simulation results indicate that the AQFP gates with increased mutual coupling by the planarized layer structure increase the maximum interconnect length between gates.

  • Detection Algorithms for FBMC/OQAM Spatial Multiplexing Systems

    Kuei-Chiang LAI  Chi-Jen CHEN  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2021/03/22
      Vol:
    E104-B No:9
      Page(s):
    1172-1187

    In this paper, we address the problem of detector design in severely frequency-selective channels for spatial multiplexing systems that adopt filter bank multicarrier based on offset quadrature amplitude modulation (FBMC/OQAM) as the communication waveforms. We consider decision feedback equalizers (DFEs) that use multiple feedback filters to jointly cancel the post-cursor components of inter-symbol interference, inter-antenna interference, and, in some configuration, inter-subchannel interference. By exploiting the special structures of the correlation matrix and the staggered property of the FBMC/OQAM signals, we obtain an efficient method of computing the DFE coefficients that requires a smaller number of multiplications than the linear equalizer (LE) and conventional DFE do. The simulation results show that the proposed detectors considerably outperform the LE and conventional DFE at moderate-to-high signal-to-noise ratios.

  • Physical Cell ID Detection Probability Using NB-IoT Synchronization Signals in 28-GHz Band

    Daisuke INOUE  Kyogo OTA  Mamoru SAWAHASHI  Satoshi NAGATA  

     
    PAPER

      Pubricized:
    2021/03/17
      Vol:
    E104-B No:9
      Page(s):
    1110-1119

    This paper presents the physical-layer cell identity (PCID) detection probability using the narrowband primary synchronization signal (NPSS) and narrowband secondary synchronization signal (NSSS) based on the narrowband Internet-of-Things (NB-IoT) radio interface considering frequency offset and the maximum Doppler frequency in the 28-GHz band. Simulation results show that the autocorrelation based NPSS detection method is more effective than the cross-correlation based NPSS detection using frequency offset estimation and compensation before the NPSS received timing detection from the viewpoints of PCID detection probability and computational complexity. We also show that when using autocorrelation based NPSS detection, the loss in the PCID detection probability at the carrier frequency of fc =28GHz compared to that for fc =3.5GHz is only approximately 5% at the average received signal-to-noise ratio (SNR) of 0dB when the frequency stability of a local oscillator of a user equipment (UE) set is 20ppm. Therefore, we conclude that the multiplexing schemes and sequences of NPSS and NSSS based on the NB-IoT radio interface associated with autocorrelation based NPSS detection will support the 28-GHz frequency spectra.

  • A Fast Algorithm for Liquid Voting on Blockchain

    Xiaoping ZHOU  Peng LI  Yulong ZENG  Xuepeng FAN  Peng LIU  Toshiaki MIYAZAKI  

     
    PAPER

      Pubricized:
    2021/05/17
      Vol:
    E104-D No:8
      Page(s):
    1163-1171

    Blockchain-based voting, including liquid voting, has been extensively studied in recent years. However, it remains challenging to implement liquid voting on blockchain using Ethereum smart contract. The challenge comes from the gas limit, which is that the number of instructions for processing a ballot cannot exceed a certain amount. This restricts the application scenario with respect to algorithms whose time complexity is linear to the number of voters, i.e., O(n). As the blockchain technology can well share and reuse the resources, we study a model of liquid voting on blockchain and propose a fast algorithm, named Flash, to eliminate the restriction. The key idea behind our algorithm is to shift some on-chain process to off-chain. In detail, we first construct a Merkle tree off-chain which contains all voters' properties. Second, we use Merkle proof and interval tree to process each ballot with O(log n) on-chain time complexity. Theoretically, the algorithm can support up to 21000 voters with respect to the current gas limit on Ethereum. Experimentally, the result implies that the consumed gas fee remains at a very low level when the number of voters increases. This means our algorithm makes liquid voting on blockchain practical even for massive voters.

  • Out-of-Bound Signal Demapping for Lattice Reduction-Aided Iterative Linear Receivers in Overloaded MIMO Systems

    Takuya FUJIWARA  Satoshi DENNO  Yafei HOU  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2021/02/15
      Vol:
    E104-B No:8
      Page(s):
    974-982

    This paper proposes out-of-bound signal demapping for lattice reduction-aided iterative linear receivers in overloaded MIMO channels. While lattice reduction aided linear receivers sometimes output hard-decision signals that are not contained in the modulation constellation, the proposed demapping converts those hard-decision signals into binary digits that can be mapped onto the modulation constellation. Even though the proposed demapping can be implemented with almost no additional complexity, the proposed demapping achieves more gain as the linear reception is iterated. Furthermore, we show that the transmission performance depends on bit mapping in modulations such as the Gray mapping and the natural mapping. The transmission performance is confirmed by computer simulation in a 6 × 2 MIMO system, i.e., the overloading ratio of 3. One of the proposed demapping called “modulo demapping” attains a gain of about 2 dB at the packet error rate (PER) of 10-1 when the 64QAM is applied.

  • Preparation Copper Sulfide Nanoparticles by Laser Ablation in Liquid and Optical Properties

    Kazuki ISODA  Ryuga YANAGIHARA  Yoshitaka KITAMOTO  Masahiko HARA  Hiroyuki WADA  

     
    BRIEF PAPER-Ultrasonic Electronics

      Pubricized:
    2021/02/08
      Vol:
    E104-C No:8
      Page(s):
    390-393

    Copper sulfide nanoparticles were successfully prepared by laser ablation in liquid. CuS powders in deionized water were irradiated with nanosecond-pulsed laser (Nd:YAG, SHG) to prepare nanoparticles. Prepared nanoparticles were investigated by scanning electron microscopy (SEM), dynamic light scattering (DLS) and fluorospectrometer. According to the results of SEM and DLS, the primary and secondary particle size was decreased with the increase in laser fluence of laser ablation in liquid. The ratio of Cu and S of prepared nanoparticles were not changed. The absorbance of prepared copper sulfide nanoparticles in water was increased with the increase in laser fluence.

  • The Fractional-N All Digital Frequency Locked Loop with Robustness for PVT Variation and Its Application for the Microcontroller Unit

    Ryoichi MIYAUCHI  Akio YOSHIDA  Shuya NAKANO  Hiroki TAMURA  Koichi TANNO  Yutaka FUKUCHI  Yukio KAWAMURA  Yuki KODAMA  Yuichi SEKIYA  

     
    PAPER-Circuit Technologies

      Pubricized:
    2021/04/01
      Vol:
    E104-D No:8
      Page(s):
    1146-1153

    This paper describes the Fractional-N All Digital Frequency Locked Loop (ADFLL) with Robustness for PVT variation and its application for the microcontroller unit. The conventional FLL is difficult to achieve the required specification by using the fine CMOS process. Especially, the conventional FLL has some problems such as unexpected operation and long lock time that are caused by PVT variation. To overcome these problems, we propose a new ADFLL which uses dynamic selecting digital filter coefficients. The proposed ADFLL was evaluatied through the HSPICE simulation and fabricating chips using a 0.13 µm CMOS process. From these results, we observed the proposed ADFLL has robustness for PVT variation by using dynamic selecting digital filter coefficient, and the lock time is improved up to 57%, clock jitter is 0.85 nsec.

  • On Measurement System for Frequency of Uterine Peristalsis

    Ryosuke NISHIHARA  Hidehiko MATSUBAYASHI  Tomomoto ISHIKAWA  Kentaro MORI  Yutaka HATA  

     
    PAPER-Medical Applications

      Pubricized:
    2021/05/12
      Vol:
    E104-D No:8
      Page(s):
    1154-1160

    The frequency of uterine peristalsis is closely related to the success rate of pregnancy. An ultrasonic imaging is almost always employed for the measure of the frequency. The physician subjectively evaluates the frequency from the ultrasound image by the naked eyes. This paper aims to measure the frequency of uterine peristalsis from the ultrasound image. The ultrasound image consists of relative amounts in the brightness, and the contour of the uterine is not clear. It was not possible to measure the frequency by using the inter-frame difference and optical flow, which are the representative methods of motion detection, since uterine peristaltic movement is too small to apply them. This paper proposes a measurement method of the frequency of the uterine peristalsis from the ultrasound image in the implantation phase. First, traces of uterine peristalsis are semi-automatically done from the images with location-axis and time-axis. Second, frequency analysis of the uterine peristalsis is done by Fourier transform for 3 minutes. As a result, the frequency of uterine peristalsis was known as the frequency with the dominant frequency ingredient with maximum value among the frequency spectrums. Thereby, we evaluate the number of the frequency of uterine peristalsis quantitatively from the ultrasound image. Finally, the success rate of pregnancy is calculated from the frequency based on Fuzzy logic. This enabled us to evaluate the success rate of pregnancy by measuring the uterine peristalsis from the ultrasound image.

  • Unified Likelihood Ratio Estimation for High- to Zero-Frequency N-Grams

    Masato KIKUCHI  Kento KAWAKAMI  Kazuho WATANABE  Mitsuo YOSHIDA  Kyoji UMEMURA  

     
    PAPER-Mathematical Systems Science

      Pubricized:
    2021/02/08
      Vol:
    E104-A No:8
      Page(s):
    1059-1074

    Likelihood ratios (LRs), which are commonly used for probabilistic data processing, are often estimated based on the frequency counts of individual elements obtained from samples. In natural language processing, an element can be a continuous sequence of N items, called an N-gram, in which each item is a word, letter, etc. In this paper, we attempt to estimate LRs based on N-gram frequency information. A naive estimation approach that uses only N-gram frequencies is sensitive to low-frequency (rare) N-grams and not applicable to zero-frequency (unobserved) N-grams; these are known as the low- and zero-frequency problems, respectively. To address these problems, we propose a method for decomposing N-grams into item units and then applying their frequencies along with the original N-gram frequencies. Our method can obtain the estimates of unobserved N-grams by using the unit frequencies. Although using only unit frequencies ignores dependencies between items, our method takes advantage of the fact that certain items often co-occur in practice and therefore maintains their dependencies by using the relevant N-gram frequencies. We also introduce a regularization to achieve robust estimation for rare N-grams. Our experimental results demonstrate that our method is effective at solving both problems and can effectively control dependencies.

  • Extracting Knowledge Entities from Sci-Tech Intelligence Resources Based on BiLSTM and Conditional Random Field

    Weizhi LIAO  Mingtong HUANG  Pan MA  Yu WANG  

     
    PAPER

      Pubricized:
    2021/04/22
      Vol:
    E104-D No:8
      Page(s):
    1214-1221

    There are many knowledge entities in sci-tech intelligence resources. Extracting these knowledge entities is of great importance for building knowledge networks, exploring the relationship between knowledge, and optimizing search engines. Many existing methods, which are mainly based on rules and traditional machine learning, require significant human involvement, but still suffer from unsatisfactory extraction accuracy. This paper proposes a novel approach for knowledge entity extraction based on BiLSTM and conditional random field (CRF).A BiLSTM neural network to obtain the context information of sentences, and CRF is then employed to integrate global label information to achieve optimal labels. This approach does not require the manual construction of features, and outperforms conventional methods. In the experiments presented in this paper, the titles and abstracts of 20,000 items in the existing sci-tech literature are processed, of which 50,243 items are used to build benchmark datasets. Based on these datasets, comparative experiments are conducted to evaluate the effectiveness of the proposed approach. Knowledge entities are extracted and corresponding knowledge networks are established with a further elaboration on the correlation of two different types of knowledge entities. The proposed research has the potential to improve the quality of sci-tech information services.

  • Generation of Large-Amplitude Pulses through the Pulse Shortening Superposed in Series-Connected Tunnel-Diode Transmission Line

    Koichi NARAHARA  

     
    BRIEF PAPER-Electronic Circuits

      Pubricized:
    2021/02/08
      Vol:
    E104-C No:8
      Page(s):
    394-397

    A scheme is proposed for generation of large-amplitude short pulses using a transmission line with regularly spaced series-connected tunnel diodes (TDs). In the case where the loaded TD is unique, it is established that the leading edge of the inputted pulse moves slower than the trailing edge, when the pulse amplitude exceeds the peak voltage of the loaded TD; therefore, the pulse width is autonomously reduced through propagation in the line. In this study, we find that this property is true even when the several series-connected TDs are loaded periodically. By these mechanisms, the TD line succeeds in generating large and short pulses. Herein, we clarify the design criteria of the TD line, together with both numerical and experimental validation.

  • Graph Laplacian-Based Sequential Smooth Estimator for Three-Dimensional RSS Map

    Takahiro MATSUDA  Fumie ONO  Shinsuke HARA  

     
    PAPER

      Pubricized:
    2021/01/08
      Vol:
    E104-B No:7
      Page(s):
    738-748

    In wireless links between ground stations and UAVs (Unmanned Aerial Vehicles), wireless signals may be attenuated by obstructions such as buildings. A three-dimensional RSS (Received Signal Strength) map (3D-RSS map), which represents a set of RSSs at various reception points in a three-dimensional area, is a promising geographical database that can be used to design reliable ground-to-air wireless links. The construction of a 3D-RSS map requires higher computational complexity, especially for a large 3D area. In order to sequentially estimate a 3D-RSS map from partial observations of RSS values in the 3D area, we propose a graph Laplacian-based sequential smooth estimator. In the proposed estimator, the 3D area is divided into voxels, and a UAV observes the RSS values at the voxels along a predetermined path. By considering the voxels as vertices in an undirected graph, a measurement graph is dynamically constructed using vertices from which recent observations were obtained and their neighboring vertices, and the 3D-RSS map is sequentially estimated by performing graph Laplacian regularized least square estimation.

  • Low-Power Implementation Techniques for Convolutional Neural Networks Using Precise and Active Skipping Methods Open Access

    Akira KITAYAMA  Goichi ONO  Tadashi KISHIMOTO  Hiroaki ITO  Naohiro KOHMU  

     
    PAPER

      Pubricized:
    2020/12/22
      Vol:
    E104-C No:7
      Page(s):
    330-337

    Reducing power consumption is crucial for edge devices using convolutional neural network (CNN). The zero-skipping approach for CNNs is a processing technique widely known for its relatively low power consumption and high speed. This approach stops multiplication and accumulation (MAC) when the multiplication results of the input data and weight are zero. However, this technique requires large logic circuits with around 5% overhead, and the average rate of MAC stopping is approximately 30%. In this paper, we propose a precise zero-skipping method that uses input data and simple logic circuits to stop multipliers and accumulators precisely. We also propose an active data-skipping method to further reduce power consumption by slightly degrading recognition accuracy. In this method, each multiplier and accumulator are stopped by using small values (e.g., 1, 2) as input. We implemented single shot multi-box detector 500 (SSD500) network model on a Xilinx ZU9 and applied our proposed techniques. We verified that operations were stopped at a rate of 49.1%, recognition accuracy was degraded by 0.29%, power consumption was reduced from 9.2 to 4.4 W (-52.3%), and circuit overhead was reduced from 5.1 to 2.7% (-45.9%). The proposed techniques were determined to be effective for lowering the power consumption of CNN-based edge devices such as FPGA.

  • Energy Efficient Approximate Storing of Image Data for MTJ Based Non-Volatile Flip-Flops and MRAM

    Yoshinori ONO  Kimiyoshi USAMI  

     
    PAPER

      Pubricized:
    2021/01/06
      Vol:
    E104-C No:7
      Page(s):
    338-349

    A non-volatile memory (NVM) employing MTJ has a lot of strong points such as read/write performance, best endurance and operating-voltage compatibility with standard CMOS. However, it consumes a lot of energy when writing the data. This becomes an obstacle when applying to battery-operated mobile devices. To solve this problem, we propose an approach to augment the capability of the precision scaling technique for the write operation in NVM. Precision scaling is an approximate computing technique to reduce the bit width of data (i.e. precision) for energy reduction. When writing image data to NVM with the precision scaling, the write energy and the image quality are changed according to the write time and the target bit range. We propose an energy-efficient approximate storing scheme for non-volatile flip-flops and a magnetic random-access memory (MRAM) that allows us to write the data by optimizing the bit positions to split the data and the write time for each bit range. By using the statistical model, we obtained optimal values for the write time and the targeted bit range under the trade-off between the write energy reduction and image quality degradation. Simulation results have demonstrated that by using these optimal values the write energy can be reduced up to 50% while maintaining the acceptable image quality. We also investigated the relationship between the input images and the output image quality when using this approach in detail. In addition, we evaluated the energy benefits when applying our approach to nine types of image processing including linear filters and edge detectors. Results showed that the write energy is reduced by further 12.5% at the maximum.

  • Encrypted Traffic Categorization Based on Flow Byte Sequence Convolution Aggregation Network

    Lin YAN  Mingyong ZENG  Shuai REN  Zhangkai LUO  

     
    LETTER-Mobile Information Network and Personal Communications

      Pubricized:
    2020/12/24
      Vol:
    E104-A No:7
      Page(s):
    996-999

    Traffic categorization aims to classify network traffic into major service types. A modern deep neural network based on temporal sequence modeling is proposed for encrypted traffic categorization. The contemporary techniques such as dilated convolution and residual connection are adopted as the basic building block. The raw traffic files are pre-processed to generate 1-dimensional flow byte sequences and are feed into our specially-devised network. The proposed approach outperforms other existing methods greatly on a public traffic dataset.

  • An Intent-Based System Configuration Design for IT/NW Services with Functional and Quantitative Constraints Open Access

    Takuya KUWAHARA  Takayuki KURODA  Takao OSAKI  Kozo SATODA  

     
    PAPER

      Pubricized:
    2021/02/04
      Vol:
    E104-B No:7
      Page(s):
    791-804

    Network service providers need to appropriately design systems and carefully configuring the settings and parameters to ensure that the systems keep running consistently and deliver the desired services. This can be a heavy and error-prone task. Intent-based system design methods have been developed to help with such tasks. These methods receive service-level requirements and generate service configurations to fulfill the given requirements. One such method is search-based system design, which can flexibly generate systems of various architectures. However, it has difficulty dealing with constraints on the quantitative parameters of systems, e.g., disk volume, RAM size, and QoS. To deal with practical cases, intent-based system design engines need to be able to handle quantitative parameters and constraints. In this work, we propose a new intent-based system design method based on search-based design that augments search states with quantitative constraints. Our method can generate a system that meets both functional and quantitative service requirements by combining a search-based design method with constraint checking. Experimental results show that our method can automatically generate a system that fulfills all given requirements within a reasonable computation time.

  • Energy-Efficient Post-Processing Technique Having High Extraction Efficiency for True Random Number Generators Open Access

    Ruilin ZHANG  Xingyu WANG  Hirofumi SHINOHARA  

     
    PAPER

      Pubricized:
    2021/01/28
      Vol:
    E104-C No:7
      Page(s):
    300-308

    In this paper, we describe a post-processing technique having high extraction efficiency (ExE) for de-biasing and de-correlating a random bitstream generated by true random number generators (TRNGs). This research is based on the N-bit von Neumann (VN_N) post-processing method. It improves the ExE of the original von Neumann method close to the Shannon entropy bound by a large N value. However, as the N value increases, the mapping table complexity increases exponentially (2N), which makes VN_N unsuitable for low-power TRNGs. To overcome this problem, at the algorithm level, we propose a waiting strategy to achieve high ExE with a small N value. At the architectural level, a Hamming weight mapping-based hierarchical structure is used to reconstruct the large mapping table using smaller tables. The hierarchical structure also decreases the correlation factor in the raw bitstream. To develop a technique with high ExE and low cost, we designed and fabricated an 8-bit von Neumann with waiting strategy (VN_8W) in a 130-nm CMOS. The maximum ExE of VN_8W is 62.21%, which is 2.49 times larger than the ExE of the original von Neumann. NIST SP 800-22 randomness test results proved the de-biasing and de-correlation abilities of VN_8W. As compared with the state-of-the-art optimized 7-element iterated von Neumann, VN_8W achieved more than 20% energy reduction with higher ExE. At 0.45V and 1MHz, VN_8W achieved the minimum energy of 0.18pJ/bit, which was suitable for sub-pJ low energy TRNGs.

  • A Low-Jitter Injection-Locked Clock Multiplier Using 97-µW Transformer-Based VCO with 18-kHz Flicker Noise Corner Open Access

    Zheng SUN  Hanli LIU  Dingxin XU  Hongye HUANG  Bangan LIU  Zheng LI  Jian PANG  Teruki SOMEYA  Atsushi SHIRANE  Kenichi OKADA  

     
    PAPER

      Pubricized:
    2021/01/08
      Vol:
    E104-C No:7
      Page(s):
    289-299

    This paper presents a high jitter performance injection-locked clock multiplier (ILCM) using an ultra-low power (ULP) voltage-controlled oscillator (VCO) for IoT application in 65-nm CMOS. The proposed transformer-based VCO achieves low flicker noise corner and sub-100µW power consumption. Double cross-coupled NMOS transistors sharing the same current provide high transconductance. The network using high-Q factor transformer (TF) provides a large tank impedance to minimize the current requirement. Thanks to the low current bias with a small conduction angle in the ULP VCO design, the proposed TF-based VCO's flicker noise can be suppressed, and a good PN can be achieved in flicker region (1/f3) with sub-100µW power consumption. Thus, a high figure-of-merit (FoM) can be obtained at both 100kHz and 1MHz without additional inductor. The proposed VCO achieves phase noise of -94.5/-115.3dBc/Hz at 100kHz/1MHz frequency offset with a 97µW power consumption, which corresponds to a -193/-194dBc/Hz VCO FoM at 2.62GHz oscillation frequency. The measurement results show that the 1/f3 corner is below 60kHz over the tuning range from 2.57GHz to 3.40GHz. Thanks to the proposed low power VCO, the total ILCM achieves 78 fs RMS jitter while using a high reference clock. A 960 fs RMS jitter can be achieved with a 40MHz common reference and 107µW corresponding power.

  • Traffic Reduction Technologies and Data Aggregation Control to Minimize Latency in IoT Systems Open Access

    Hideaki YOSHINO  Kenko OTA  Takefumi HIRAGURI  

     
    INVITED PAPER

      Pubricized:
    2021/02/04
      Vol:
    E104-B No:7
      Page(s):
    706-715

    The spread of the Internet of Things (IoT) has led to the generation of large amounts of data, requiring massive communication, computing, and storage resources. Cloud computing plays an important role in realizing most IoT applications classified as massive machine type communication and cyber-physical control applications in vertical domains. To handle the increasing amount of IoT data, it is important to reduce the traffic concentrated in the cloud by distributing the computing and storage resources to the network edge side and to suppress the latency of the IoT applications. In this paper, we first present a recent literature review on fog/edge computing and data aggregation as representative traffic reduction technologies for efficiently utilizing communication, computing, and storage resources in IoT systems, and then focus on data aggregation control minimizing the latency in an IoT gateway. We then present a unified modeling for statistical and nonstatistical data aggregation and analyze its latency. We analytically derive the Laplace-Stieltjes transform and average of the stationary distribution of the latency and approximate the average latency; we subsequently apply it to an adaptive aggregation number control for the time-variant data arrival. The transient traffic characteristics, that is, the absorption of traffic fluctuations realizing a stable optimal latency, were clarified through a simulation with a time-variant Poisson input and non-Poisson inputs, such as a Beta input, which is a typical IoT traffic model.

321-340hit(6809hit)