The technique used is based on thermal optical activity measurement of temperature combined with electric-field-induced polarization modulation of the input light. Quartz is used as the sensing element. A 1/4 wave plate is placed behind the quartz so that a single sensing head can simultaneously output two signals: one includes the Pockels effect for voltage measurement; the other optical activity for the temperature measurement. The operating principle of the sensor which detects voltage and temperature is presented theoretically and experimentally. The technique for separating voltage and temperature from the signals is analyzed theoretically and experimentally. It was found that the sensitivity of the voltage sensor to temperature depends on the magnitudes of voltage applied to it. To realize temperature compensation over a full range, two key parameters must be obtained: one is the response of the voltage sensor to temperature when the applied voltage is zero; another is the response of the sensing material to temperature when a certain voltage is applied. In the absence of electrogyration the effect of voltage on the temperature sensor may be neglected. The technique was demonstrated using a fiber-optic voltage sensor with temperature compensation. The sensor offered a voltage measurement range of 0-10 kV, and a temperature stability of 0.4% within the temperature range of 20-70.

This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.

A two-phase boosted voltage (VPP) generator circuit was proposed for use in giga-bit DRAMs. It reduced the maximum gate oxide voltage of pass transistor and the lower limit of supply voltage to VPP and VTN respectively while those for the conventional charge pump circuit are VPP+VDD and 1.5 VTN respectively. Also the pumping current was increased in the new circuit.

This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a 0.35 µm SOI (silicon on insulator) CMOS process. The SOI devices have high speed performance even at low operating voltage (below 1 V) because of their smaller parasitic capacitance at source and drain than those of bulk MOSs. A body of a MOSFET can be controlled by using a field shield (FS) plate. The transistor body of the LNA is connected to its gate. The threshold voltage of the transistor becomes lower due to the body-biased effect so that a large drain current keeps the gain high, and active-body control improves the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB gain compression point is +1.5 dBm. The gain and the output power at the 1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively than those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained at the supply voltage of 0.5 V.

A 10-bit 3-Msample/s multibit cyclic A/D converter for mixed-signal LSIs with a small chip-area of 1.5 mm2 and low power consumption of 10.8 mW with a 2.7-V power supply was realized using a 0.8-µm CMOS process. This ADC module is designed for high-speed servo-controller LSIs used in hard-disk-drive systems. We found that three-cycle cyclic conversion (four bit, three bit+(one redundant bit), and three bit+(one redundant bit)) was optimal for achieving 10-bit resolution with a small chip-area and low power consumption given a required conversion time of 0.33 µs. Our multipath architecture cut power consumption by 30% compared to conventional cyclic A/D converters. By adding one signal path between the residue amplifier and the four bit subADC, the settling timing requirement can be relaxed, and the amplifier's power consumption thus reduced.

An OTA without a tail-current source is proposed for low power supply voltages. Only two MOSFET's are connected between power supply lines in order to operate under low power supply voltages. A few MOSFET's are added at the expense of eliminating the tail-current source of the conventional OTA. SPICE simulation is shown in order to evaluate the proposed circuits. As an application, a low-pass filter is realized by employing the proposed OTA's.

This paper describes a distributed traffic control scheme for large multi-stage ATM switching systems. When a new virtual circuit is to be added from some source line-interface unit (LU) to a destination LU, the system must find an optimal path through the system to accommodate the new circuit. Conventional systems have a central control processor and control lines to manage the bandwidth of all the links in the systems. The central control processor handles all the virtual circuits, but have trouble doing this when the switching system becomes large because of the limited ability of the central processor to handle the number of virtual circuits. A large switching system with Tbit/s-class throughput requires a distributed traffic control scheme. In our proposed switching system, each port of the basic switches has its own traffic monitor. Operation, administration, and maintenance (OAM) cells that are defined inside the system carry the path-congestion information to the LUs, enabling each LU to route new virtual circuits independently. A central control processor and control lines are not required. The performance of the proposed system depends on the interval between OAM cells. This paper shows how an optimal interval can be determined in order to maximize the bandwidth for user cells. This traffic control scheme will suit future Tbit/s ATM switching systems.

This paper proposes a realization of power factor function generator having an arbitrary base and power factor which are determined by the ratios of the currents provided from outside of the circuit. The circuit characteristics do not depend on any transistor parameters, temperature, and other environmental conditions. The circuit operation is based on current mode that has a capability of low power supply voltage operation below than 2.0 V. SPICE simulation has been carried out using 0.7 µm BiCMOS parameters and shows quite good transfer characteristics.

This paper deals with the prediction of stock trends by using the wavelet transform and the multi-stage fuzzy inference system based upon the optimization of membership function by using the GA. The system is expected to recognize the short-term feature which is usually used to estimate the rise/fall of price by human experts. In the prediction of stock prices, the wavelet transform is used to describe the short term feature of the stock trend. The fractal dimension and the variance of the time series are also used as the input variables. By dividing the inference system into multiple stages, the total number of rules is sufficiently depressed compared to the single stage system. In each stage of inference only a portion of input variables are used as the input, and output of the stage is treated as an input to the next stage. To give better performance, the shape of the membership function of the inference rules is optimized by using the GA. Each individual corresponds to an inference system, and its fitness is calculated as the ratio of the correct recognition. In the simulation study, we define the rise and fall of prices by considering the threshold value for the price change, and the interval of prediction. Then, the parameters of the system are adjusted by using the data for learning and the performance is evaluated by comparing the prediction and observation. The simulation study shows that the inference system gives about a 70% correct prediction of the price change of stocks. The result is compared to the prediction by the neural network, and we see better classification of the fuzzy system.

A tail current source is often employed for many analog building blocks. It can limit the increase of excess power. It can also improve CMRR and PSRR. In this paper, we propose a very high output impedance tail current source for low voltage applications. The proposed tail current source has almost the same output impedance as the conventional cascode type tail current source in theory. Simulation results show that the output impedance of the proposed circuit becomes 1.28 GW at low frequencies. Applying the proposed circuit to a differential amplifier, the CMRR is enhanced by 66.7 dB, compared to the conventional differential amplifier. Moreover, the proposed circuit has the other excellent merit. The output stage of the proposed tail current source can operate at VDS(sat) and a quarter of VDS(sat) of the simple current source in theory and simulation, respectively. For example, in the simulation, when the reference current IREF is set to 100µA, the minimum voltage of the simple current source approximates 0.4 V, whereas that of the proposed current source approximates 0.1 V. Thus, the dynamic range can be enlarged by 0.3 V in this case. The value is still enough large value for low voltage applications. Hence, the proposed tail current source is suitable for low voltage applications.

We have studied the characteristic trade-offs in low power and low voltage MOSFETs from the viewpoint of back-gate control and body effect factor. Previously reported MOSFET structures are classified into four categories in terms of back-gate structures. It is shown that a MOSFET with a fixed back-bias has only a limited current drive at low voltage irrespective of device structures, while current drive of a dynamic threshold MOSFET with body tied to gate is more enhanced with increasing body effect factor. We have proposed a new dynamic threshold MOSFET, electrically induced body (EIB) DTMOS, which has a very large body effect factor at low threshold voltage and high current drive at low supply voltage.

The outage probability of a forward link DS-CDMA cellular system with fast transmit power control (TPC) based on signal-to-interference ratio (SIR) is investigated. The expression for SIR at the output of RAKE receiver is developed, and the outage probability is evaluated by using Monte Carlo simulation. We consider two kinds of channel models: random delay resolvable path model and tapped delay line model which are suitable models for a few distinct paths channel and highly frequency-selective-channel model, respectively. The outage probability of a system with fast TPC based on SIR is compared to that without fast TPC. The use of orthogonal spreading codes is compared to that of the random spreading codes in terms of outage probability. The effects of the maximum and minimum transmit powers and the dispersive loss of signal power on the outage probability are also investigated.

It is the purpose of this paper to review the generation of quantized voltage steps in Josephson-junctions, and also the recent practical application of these precise measurements. A 10-V Josephson-junction-array-voltage standard system has been established with a Josephson-junction-array, a phase-locked millimeter wave, and a precise null-detection system. Based on these technologies, the AC Josephson effect has been applied to other precise measurements such as DC error voltage of a multi-integrating analog-to-digital converter and for a pulse-width-modulation type precise voltage calibrator.

This paper use a site-specific model to characterize the performance of millimeter wave BPSK system with single cochannel interference. Shooting and bouncing ray/image techniques are applied to compute the impulse responses for concrete-wall-partition rooms and plasterboard-wall-partition rooms. By using the impulse responses of these multipath channels, the BERs (Bit Error Rates) for high-speed BPSK (binary phase shift keying) systems with phase and timing recovery circuits are calculated. In addition, the carrier-to-interference ratio is also computed. Numerical results show that the interference for the plasterboard-wall-partition rooms is more severe than that for the concrete-wall-partition rooms.

Linear signal analysis (LSA) is the conventional method of estimating the playback voltage and pulse width in linearly operating shielded GMR heads. To improve the accuracy of LSA, a new, highly precise LSA which includes the effect of the magnetization distribution in the medium and inhomogeneous biasing by domain control magnets, was developed. Utilizing this new LSA to calculate the playback waveforms, the calculated peak voltage and pulse width were compared with the experimental values and agreement within 10% was obtained. As the result of estimation using the new LSA, it is considered that the use of a vertical-type spin-valve head will make it possible to achieve a recording areal density of 40 Gb/in2.

A fully on-chip current controlled open-drain output driver using a bandgap reference current generator was designed for high bandwidth DRAMs. It reduces the overhead of receiving a digital code from an external source for the compensation of the temperature and supply voltage variations. The correct value of the current control register is updated at the end of every auto refresh cycle. The operation at the data rate up to 0.8 Gb/s was verified by SPICE simulation using a 0.22 µm triple-well CMOS technology.

In this paper, we consider an integrated voice and data system over CDMA Slotted-ALOHA (CDMA S-ALOHA). We investigate its performance when multi-code CDMA (MC-CDMA) is applied as a multi-rate scheme to support users which require transmission with different bit rates. Two different classes of data users are transmitted together with voice. Performance measurement is obtained in respect of throughput for data and outage probability for voice. Moreover, we consider the Modified Channel Load Sensing Protocol (MCLSP) as a traffic control to improve the throughput of data. As a result, we show that the MC-CDMA technique is an effective one to obtain good throughput for data users at an acceptable voice outage probability. Furthermore, we show that with MCLSP, the throughput of data can be improved to reach a constant value even at a high offered load of data users.

For the realization of low-voltage full-color FEDs, requirements for phosphor for the FED are proposed. Especially, the influence of released gases or substances from phosphors on the field emission within the FED was made clear. It was clarified that the analysis of F-N plots of the V-I curve of field emission characteristics was helpful to know the interaction of field emission and phosphors. In the experiment, we first obtained the depth from the phosphor surface of the low voltage electron excitation in case of ZnGa2O4, where the region available for cathodoluminescence at the anode voltage of 400 V is about 63 nm deep from the surface. The characteristic of the 12.4 cm-320(trio)240 pixels low-voltage full-color FED is reported. The luminance of 154 cd/m2 was attained at the anode voltage of 400 V and the duty factor of 1/241. Supported by the high potential of the FED as a flat panel, each problem shall be steadily solved to secure the firm stand as a new full color flat display in new applications.

This paper shows the design of multi-stage fuzzy inference system with smaller number of rules based upon the optimization of rules by using the genetic algorithm. Since the number of rules of fuzzy inference system increases exponentially in proportion to the number of input variables powered by the number of membership function, it is preferred to divide the inference system into several stages (multi-stage fuzzy inference system) and decrease the number of rules compared to the single stage system. In each stage of inference only a portion of input variables are used as the input, and the output of the stage is treated as an input to the next stage. If we use the simplified inference scheme and assume the shape of membership function is given, the same backpropagation algorithm is available to optimize the weight of each rule as is usually used in the single stage inference system. On the other hand, the shape of the membership function is optimized by using the GA (genetic algorithm) where the characteristics of the membership function is represented as a set of string to which the crossover and mutation operation is applied. By combining the backpropagation algorithm and the GA, we have a comprehensive optimization scheme of learning for the multi-stage fuzzy inference system. The inference system is applied to the automatic bond rating based upon the financial ratios obtained from the financial statement by using the prescribed evaluation of rating published by the rating institution. As a result, we have similar performance of the multi-stage fuzzy inference system as the single stage system with remarkably smaller number of rules.

The current-voltage characteristics of a single electron transistor (SET) in the resonant transport mode are investigated. In the future when SET devices are applied to integrated electronics, the quantum effect will seriously modify their characteristics in ultra-small geometry. The current will be dominated by the resonant transport through narrow energy levels in the dot. The simple case of a two-level system is analyzed and the transport mechanism is clarified. The transport property at low temperatures (higher than the Kondo temperature) in the low tunneling rate limit is discussed, and a current map where current values are classified in the gate bias-drain bias plane is provided. It was shown that the dynamic aspect of electron flow seriously influences the current value.