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IEICE TRANSACTIONS on Electronics

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Advance publication (published online immediately after acceptance)

Volume E88-C No.10  (Publication Date:2005/10/01)

    Special Section on Recent Technologies on Devices, Circuits, and Systems for Millimeter-wave ITS Applications
  • FOREWORD

    Masayuki FUJISE  

     
    FOREWORD

      Page(s):
    1913-1914
  • An Improved FDTD Formulation for High-Order Linear Circuit Based on Matrix Theory and Improved Integral Transform

    Zhenhai SHAO  Masayuki FUJISE  

     
    INVITED PAPER

      Page(s):
    1915-1921

    Millimeter-wave (MMW) communication systems, specially from 60 GHz band, are expected to play a key role in realizing the intelligent transportation system (ITS) for high date rate and mulitmedia communications. During the last years, System-in-package (SiP) solutions for MMW RF-transceiver have become an attractive alternative to System-on-Chip (SoC) approaches. In the scheme, active circuits are integrated with passive circuit much tightly. Traditional distributed hybrid circuit concept, such as ADS and Microwave Office, is not quite applicable for SiP, specially in MMW frequency. In this paper, an improved finite-difference time-domain formulation using the matrix theory and an improved integral transform is presented to solve hybrid high-order linear lumped circuit and passive circuit problem implicitly instead of explicit method used for traditional FDTD method. In this improved method, general high-order linear lumped circuit is expressed firstly as not only one equation but also equations set according kirchhoff's laws. Then, a local iterative matrix expression connecting with each active circuit can be built when EM fields, current/current density and interior variable of equations set are treated as separated vector element. In order to make this formulation stable, an improved integral transform is proposed to reform the matrix's condition number. Simulations show that the results by our improved FDTD formulation can effectively not only keep the accuracy of passive circuit, but also integrate high-order linear lumped circuit expressed by equations set as well as one equation.

  • Development of Ultra-Wideband Short-Range Impulse Radar System for Vehicular Applications

    Kiyoshi HAMAGUCHI  Hiroyo OGAWA  Takehiko KOBAYASHI  Ryuji KOHNO  

     
    INVITED PAPER

      Page(s):
    1922-1931

    This paper introduces a state-of-art on an ultra-wideband (UWB) technology in intelligent transport systems (ITS). To examine the detection performance of a UWB short-range radar for vehicular applications, we developed a 26-GHz band short-range UWB radar system with an embedded compact MMIC-based RF module. In this paper, we briefly comment on the current regulatory environment for UWB radar systems by outlining the structure of an international organization involved in examining the regulatory status of these systems. We then describe the principles of detection and system design for impulse radar, the radar system that we developed, and a MMIC-based RF module as well as the performance of these devices. We measured their performance in a series of laboratory experiments and also measured UWB radar cross sections of an automobile. The results of our experiments suggest that our radar system is capable of detecting targets with a range resolution of around 9 cm.

  • Millimeter-Wave High-Speed Spot Communication System Using Radio-Over-Fiber Technology

    Katsuyoshi SATO  Masayuki FUJISE  Satoru SHIMIZU  Seiji NISHI  

     
    PAPER

      Page(s):
    1932-1938

    We developed Millimeter-wave high speed spot communication system using radio-over-fiber technology for ITS telecommunication use. This system has wide bandwidth and provides a high-capacity channel between the base station and parked vehicles. The installation conditions (height, elevation angle) of the base station antenna of this system that enabled the largest possible communication area were obtained by simulation. In addition, we measured propagation and transmission characteristics. The width of the error-free service area was 8 m, which enables three vehicles to be served in one service area.

  • 77-GHz MMIC Module Design Techniques for Automotive Radar Applications

    Yasushi ITOH  Kazuhiko HONJO  

     
    REVIEW PAPER

      Page(s):
    1939-1946

    Recent advances in 77-GHz MMIC module design techniques for automotive radar applications are reviewed in this paper. The target of R&D activities is moving from high performance to low cost, mass production, high-yield manufacturing and testing. To meet the stringent requirements, millimeter-wave module design techniques have made significant progress especially in packaging, bonding, and making interface with other modules. In addition, millimeter-wave semiconductor devices and MMICs have made remarkable improvements for low cost and mass production. In this paper, the topics focusing on millimeter-wave semiconductor devices and 77-GHz MMICs are reviewed first. Then the recent R&D results on 77-GHz MMIC module design techniques are introduced, showing the technical trend of packaging, bonding, and making interface with other modules for millimeter-wave, highly-integrated, low-cost MMIC modules. Finally, the existing and future module design issues for automotive radar applications are discussed.

  • A Millimeter-Wave Pulse Transmitter with a Harmonic Mixer

    Kenji KAWAKAMI  Hiroshi IKEMATSU  Koichi MATSUO  Naohisa UEHARA  Moriyasu MIYAZAKI  Tadashi TAKAGI  

     
    PAPER

      Page(s):
    1947-1951

    This paper describes a millimeter-wave pulse transmitter with a 38 GHz-band Voltage Controlled Oscillator (VCO) and a 77/38 GHz-band harmonic mixer. This harmonic mixer works as both of a pulse modulator and a multiplier. This configuration of the transmitter is very simple, and can be applied to high-speed pulse modulation like Ultra Wide Band. By using the harmonic mixer, furthermore, a fluctuation of the load impedance of the 38 GHz VCO can be reduced. Compared with the conventional configuration, the required amount of isolation between the VCO and the load has been able to be reduced by more than 30 dB as a result of the experiment in a millimeter-wave band.

  • An Alternating-Phase Fed Single-Layer Slotted Waveguide Array in 76 GHz Band and Its Sidelobe Suppression

    Yuichi KIMURA  Masanari TAKAHASHI  Jiro HIROKAWA  Makoto ANDO  Misao HANEISHI  

     
    PAPER

      Page(s):
    1952-1960

    This paper presents designs and performances of 76 GHz band alternating-phase fed single-layer slotted waveguide arrays. Two kinds of design, that is, uniform aperture illumination for maximum gain and Taylor distribution for sidelobe suppression of -25 dB, are conducted. High gain and high efficiency performance of 34.8 dBi with 57% is achieved for the former, while satisfactory sidelobe suppression of -20 dB in the H-plane and -23 dB in the E-plane with high efficiency is confirmed for the latter. The simple structure dispensing with electrical contact between the slotted plate and the groove feed structure is the key advantage of alternating-phase fed arrays and the slotted plate is just tacked on the feed structure with screws at the periphery. High gain and high efficiency performances predicted theoretically as well as design flexibility of the alternating-phase fed array are demonstrated in the millimeter wave frequency.

  • The First Higher Mode Strip Transmission Line as a Loss-Reduced and Mass-Productive Printed Circuit at Millimeter-Wavelength

    Futoshi KUROKI  Kazuya MIYAMOTO  Shigeo NISHIDA  

     
    PAPER

      Page(s):
    1961-1967

    A higher mode tri-plate strip transmission line, in which the first higher mode propagates, was developed to realize mass production of millimeter-wave integrated circuits for application in intelligent transport systems, and its transmission characteristics were investigated. The design diagram of this guided mode was determined and a higher mode tri-plate strip transmission line was fabricated at 30 GHz. The dispersion curve was found to be similar to that of a rectangular waveguide and a low transmission loss of less than 10 dB/m was obtained. For construction of some functional devices, two types of basic reactance components, such as a gap and a slot, were expressed by equivalent circuits. The former was expressed by capacitive parameters, and the latter was expressed by an ideal transformer with inductive parameters. The gap-coupled circuit was successfully employed for a 3-pole 0.1 dB Chebyshev ripple band-pass filter with a small excess insertion loss of less than 1 dB at a center frequency of 32 GHz, as well as no spurious response in a bandwidth from 26.5 GHz to 40 GHz. The slot element acted as a matching circuit and a suppressor of the lowest mode, which is the TEM mode in the tri-plate strip transmission line. Moreover, this element was applied to a mode transformer between the lowest mode and the first higher mode.

  • A Transition between NRD Guide and Microstrip Line at 60 GHz

    Futoshi KUROKI  Makoto KIMURA  Tsukasa YONEYAMA  

     
    PAPER

      Page(s):
    1968-1972

    A transition between an NRD guide, suitable for construction of high performance millimeter-wave integrated circuits, and a microstrip line, being used to mount semiconductor devices such as HEMT, HBT, and MMIC, was developed at 60 GHz. The main emphasis was placed on the manner of field matching between the NRD guide and the microstrip line. We propose adoption of this a new transition structure employing a vertical strip line, which can be easily coupled to the NRD guide, and a coaxial line connected to the microstrip line. Moreover, we applied a packaging structure with a choke circuit for the microstrip line to prevent undesired leakage between the NRD guide and the microstrip line. The insertion loss of the fabricated transition was measured to be less than 0.5 dB in the bandwidth of 3 GHz at a center frequency of 60.5 GHz. The transition was applied to MMIC amplifier integration in the NRD guide at 60 GHz. The forward and reverse gains were measured to be 15 dB and -20 dB, respectively, at 60 GHz.

  • Millimeter-Wave Broadband Mixers in New Testing and Measurement Instruments for High Data Rate Signal Analyses

    Masayuki KIMISHIMA  

     
    PAPER

      Page(s):
    1973-1980

    The millimeter-wave (MMW) broadband mixers that are useful for measurement instruments to analyze MMW high data rate signals have been investigated. At first, we propose the specialized RF front-end for analyses of MMW high data rate signals. Next, the required specifications for the 1st mixers of the front-end are estimated, and the design, fabrication, and testing results of Q, V, and W-band monolithic broadband resistive mixers are described. The testing results are compared with performances of the diode mixer designed for V-band. It was found that the resistive mixers have very attractive performances of low conversion loss, good frequency flatness and high third order intercept point (IP3) with low Local (LO) oscillators power. The developed resistive mixers are suitable for the proposed MMW band measurement instruments.

  • Regular Section
  • Resonance Analysis of Multilayered Filters with Triadic Cantor-Type One-Dimensional Quasi-Fractal Structures

    Ushio SANGAWA  

     
    PAPER-Electromagnetic Theory

      Page(s):
    1981-1991

    Multilayered filters with a dielectric distribution along their thickness forming a one-dimensional quasi-fractal structure are theoretically analyzed, focusing on exposing their resonant properties in order to understand a dielectric Menger's sponge resonator [4],[5]. "Quasi-fractal" refers to the triadic Cantor set with finite generation. First, a novel calculation method that has the ability to deal with filters with fine fractal structures is derived. This method takes advantage of Clifford algebra based on the theory of thin-film optics. The method is then applied to classify resonant modes and, especially, to investigate quality factors for them in terms of the following design parameters: a dielectric constant, a loss tangent, and a stage number. The latter determines fractal structure. Finally, behavior of the filters with perfect fractal structure is considered. A crucial finding is that the high quality factor of the modes is not due to the complete self-similarity, but rather to the breaking of such a fractal symmetry.

  • Modeling and Measurement of Mode-Conversion and Frequency Dependent Loss in High-Speed Differential Interconnections on Multilayer PCB

    Seungyong BAEK  Jingook KIM  Joungho KIM  

     
    PAPER-Microwaves, Millimeter-Waves

      Page(s):
    1992-2000

    We propose an accurate and efficient model of having an unbalanced differential line structure, where mode-conversion and frequency dependent loss effects are considered in above the GHz frequency range. To extract model parameters of the proposed unbalanced differential line model, we measured s-parameters of test patterns using a 2-port VNA and defined a new type of mixed-mode s-parameter. The model parameters were obtained and are described for various types of the unbalanced differential line structures. Finally, the validity of the proposed model and the model parameters were successfully confirmed by a series of time-domain measurements and a lattice diagram analysis.

  • High-Speed Digital Circuit Design Using Differential Logic with Asymmetric Signal Transition

    Masao MORIMOTO  Makoto NAGATA  Kazuo TAKI  

     
    PAPER-Electronic Circuits

      Page(s):
    2001-2008

    Asymmetric slope differential CMOS (ASD-CMOS) and asymmetric slope differential dynamic logic (ASDDL) surpass the highest speed that conventional CMOS logic circuits can achieve, resulting from deeply shortened rise time along with relatively prolonged fall time. ASD-CMOS is a static logic and ASDDL is a dynamic logic without per-gate synchronous clock signal, each of which needs two-phase operation as well as differential signaling, however, interleaved precharging hides the prolonged fall time and BDD-based compound logic design mitigates area increase. ASD-CMOS 16-bit multiplier in a 0.18-µm CMOS technology demonstrates 1.78 nsec per an operation, which reaches 34% reduction of the best delay time achieved by a multiplier using a CMOS standard cell library that is conventional yet tuned to the optimum in energy-delay products. ASDDL can be superior to DCVS-DOMINO circuits not only in delay time but also in area and even in power. ASDDL 16-bit multiplier achieves delay and power reduction of 4% and 20%, respectively, compared with DCVS-DOMINO realization. A prototype ASD-CMOS 16-bit multiplier with built-in test circuitry fabricated in a 0.13-µm CMOS technology operates with the delay time of 1.57 nsec at 1.2 V.

  • Multi-Gigabit Pre-Emphasis Design and Analysis for Serial Link

    Chih-Hsien LIN  Chang-Hsiao TSAI  Chih-Ning CHEN  Shyh-Jye JOU  

     
    PAPER-Electronic Circuits

      Page(s):
    2009-2019

    In this paper, a multi-Gbps pre-emphasis design methodology and circuits for a 4/2 Pulse Amplitude Modulation (PAM) transmitter of high-speed data serial link over cable are proposed. Theoretically analysis of the total frequency response including pre-emphasis, package, cable loss and termination are first carried out. In order to gain higher data rates without increasing of symbol rate, we use 4 PAM in our system. Then, we propose a pre-emphasis architecture and algorithm that can enlarge the high frequency response so the overall frequency response in the receiver side is uniform within the desired frequency range. The overall circuit is implemented in TSMC 0.18 µm 1P6M 1.8 V CMOS process. A test chip of this transmitter with pre-emphasis, PLL circuit and on-chip termination resistors is implemented by full custom flow to verify the design methodology. The measurement results of 10/5 Gbps (4/2 PAM) are carried out over 5 meter (m) long cable and is in agreement with our analysis and simulation results.

  • A Study of Sense-Voltage Margins in Low-Voltage-Operating Embedded DRAM Macros

    Akira YAMAZAKI  Fukashi MORISHITA  Naoya WATANABE  Teruhiko AMANO  Masaru HARAGUCHI  Hideyuki NODA  Atsushi HACHISUKA  Katsumi DOSAKA  Kazutami ARIMOTO  Setsuo WAKE  Hideyuki OZAKI  Tsutomu YOSHIHARA  

     
    PAPER-Integrated Electronics

      Page(s):
    2020-2027

    The voltage margin of an embedded DRAM's sense operation has been shrinking with the scaling of process technology. A method to estimate this margin would be a key to optimizing the memory array configuration and the size of the sense transistor. In this paper, the voltage margin of the sense operation is theoretically analyzed. The accuracy of the proposed voltage margin model was confirmed on a 0.13-µm eDRAM test chip, and the results of calculation were generally in agreement with the measured results.

  • An Autonomous Flight Control Strategy Study of a Small-Sized Unmanned Aerial Vehicle

    Huaiyu WU  Dong SUN  Hongbing ZHU  Zhaoying ZHOU  

     
    PAPER-Electronic Instrumentation and Control

      Page(s):
    2028-2036

    The purpose of this paper is to present a case study of the development, implementation and performance analysis of an autonomous flight control strategy for a 1-meter small-sized unmanned aerial vehicle. Firstly, a learning algorithm based open-loop control is proposed by simulating a skilled human operator's manipulation of the aircraft. This is aimed to generate a set of command data inputs and investigate the multi-channel control characteristics with the open-loop control. Secondly, a feedforward plus a proportional and derivative (PD) feedback control is employed to control the vehicle in following the command data to complete the loitering flight. The PD control gains are tuned automatically according to the attitude of the vehicle using the fuzzy logic theory. Thirdly, autonomous flight experiments conducted on a 1-meter small-sized aerial vehicle demonstrated the effectiveness of the proposed method.

  • A New Low Power Test Pattern Generator for BIST Architecture

    Kicheol KIM  Dongsub SONG  Incheol KIM  Sungho KANG  

     
    LETTER-Semiconductor Materials and Devices

      Page(s):
    2037-2038

    A new low power test pattern generator (TPG) which can effectively reduce the average power consumption during test application is developed. The new TPG reduces the weighted switching activity (WSA) of the circuit under test (CUT) by suppressing transitions at some primary inputs which make many transitions. Moreover, the new TPG does not lose fault coverage. Experimental results on the ISCAS benchmark circuits show that average power reduction can be achieved up to 33.8% while achieving high fault coverage.