The present state of IEC and JIS standards is reviewed on measurement methods of low-loss dielectric and high-tempera-ture superconductor (HTS) materials in the microwave and millimeter wave range. Four resonance methods are discussed actually, that is, a two-dielectric resonator method for dielectric rod measurements, a two-sapphire resonator method for HTS film measurements, a cavity resonator method for microwave measurements of dielectric plates and a cutoff circular waveguide method for millimeter wave measurements of dielectric plates. These methods realize the high accuracy sufficient for measurements of temperature dependence of material properties.

Recent advances in measurement techniques for microwave active devices and circuits are reviewed in this paper. The R&D activities have been devoted aggressively how to characterize nonlinear performance of high power devices and circuits. They are pulsed I-V, a variety of load-pull measurements, probing, sampling, and sensing techniques, supported by the recent significant advances in DSP (Digital Signal Processing), RF components, semiconductor devices, etc. The recent advances in vector network analyzers are of our great interest. They are (a) multi-port vector network analyzers for characterizing mixers, differential devices, packaged components, electronic package characterization, and multi-layer transmission lines, and (b) EO (Electro-Optic) modulated vector network analyzers for characterizing electronic performance of EO devices with the aid of EO modulators and photonic probes. In addition, probing, sampling, and sensing techniques have made great progress to directly measure electromagnetic field, time-domain voltage waveform, and temperature in small spot areas. In this paper, some topics related to these measurement techniques are briefly reviewed. Then the existing and future issues for characterization and measurement techniques of microwave active devices and circuits are discussed.

A novel method for measuring microwave reflection coefficients without the open and load standards is proposed. In this method, a single probe is inserted into an air line and the output wave is detected by a vector detector. Offset shorts are used for the calibration. The measurement system is constructed using 7 mm coaxial line and APC7 connectors. The result of the measurement in the frequency range 1-9 GHz shows the possibility of the proposed method. All the major systematic errors can be estimated from the data that is easily obtainable.

A novel resonator structure for the cut-off circular waveguide method is proposed to suppress the unwanted TE modes in the axial direction and TM modes in the radial direction. In this method, a dielectric plate sample is placed between two copper circular cylinders and clamped by two clips. The cylinder regions constitute the TE_0m mode cut-off waveguides. The measurement principle is based on a rigorous analysis by the Ritz-Galerkin method. Many resonance modes observed in the measurement can be identified effectively by mode charts. In order to verify the validity of the novel structure for this method, the temperature dependences for three low-loss organic material plates were measured in the frequency range 40 to 50 GHz. It is found that modified polyolefin plates have comparable electric characteristics and low price, compared with PTFE plates. Moreover, it is verified that the novel resonator structure is effective in improvement of accuracy and stability in measurement. The measurement precisions are estimated within 1 percent for ε_r and within 15 percent for tan δ.

Precise designs are presented for sapphire rod resonators of three types, which have been proposed by the IEC/TC90/WG8 in the standard measurement method of the surface resistance R_s of high-T_c superconductor (HTS) films; an open-type, a cavity-type and a closed-type. In order to separate TE₀₁₁ and TE₀₁₃ modes, which are used in R_s measurements, from the other modes, appropriate dimensions for these three resonators are determined from mode charts calculated from a rigorous analysis based on the mode matching method, taking account of an uniaxial-anisotropic characteristic of sapphire. Comparison of the open-type resonator with the closed-type is performed. For the open-type, the unloaded Q values of both the TE₀₁₁ and TE₀₁₃ modes are reduced by radiations of a leaky state TM₃₁₀ mode. Finally, validity of the design and a two-sapphire-rod-resonator method will be verified by experiments.

This paper is focused on the measurement of the complex permittivity of a liquid phantom by the transmission line method using a coaxial line for measuring high-permittivity and high-loss materials. First, the complex permittivity of the liquid phantom material is measured under various physical lengths of the coaxial line for accurate measurement. Secondly, comparison between the measured result and the result obtained by the coaxial probe method is carried out in the frequency range from 0.5 to 3 GHz. Finally, the measurement error included in the complex permittivity is estimated quantitatively. The discussions lead to the conclusion that accurate measurement of the liquid material with high-permittivity and high-loss is possible by the presented method.

A rigorous analysis for a TM₀₁₀ mode cylindrical cavity with insertion holes is presented on the basis of the Ritz-Galerkin method to realize accurate measurements of the complex permittivity of liquid. The effects of sample insertion holes, a dielectric tube, and air-gaps between a dielectric tube and sample insertion holes are taken into account in this analysis. The validity of this method is verified from measured results of some kinds of liquid.

A hybrid method-of-moments (MoM) and immittance approach for efficient and accurate analysis of printed slots and strips of arbitrary shape in layered waveguide for various applications has been proposed. An impedance-type MoM is formulated from the electric field integral equation (EFIE) for printed strip case and an admittance-type MoM is formulated from the magnetic field integral equation (MFIE) for the printed slot case, using the Galerkin's technique. Immittance approach has been used to calculate spectral dyadic Green's functions for the layered waveguide. For efficient analysis of large and complex structures, equivalent circuit parameters of a block are first extracted and complete structure is analyzed through cascaded ABCD matrices. The equivalent circuit characterization of printed strip and slot in layered waveguide has been done for the first time. Finite periodic structure loaded with printed strips has been investigated and it shows the electromagnetic bandgap (EBG) behavior. The electromagnetic (EM) program hence developed is checked for its numerical accuracy and efficiency with results generated with High-frequency structure simulator (HFSS) and shows good performance.

An important barrier to the application of high-temperature superconducting microwave filters is their power-handling capability. To clarify the key parameters for improving the power-handling capability of rf filters based on high-temperature superconductors with microstrip structures, we synthesize bandpass filters with different layouts using several kinds of thin film high-temperature superconductors, and subject them to third-order intermodulation measurements. By improving the sensitivity of the measurement set-up through the selective reduction of the fundamental output signals, we succeed in measuring the intermodulation signals of the superconducting filters. The experimental results indicate that increasing the film thickness and utilizing MBE-grown films of NdBa₂Cu₃O₇ films are effective in obtaining high-power handling microstrip filters.

The maximum operating region of a SiGe HBT has been experimentally investigated by a direct microwave waveform measurement. Dynamic RF load lines are used as a probe to detect the limit of the RF operation. For the first time, it is found that SiGe HBTs operate beyond the conventional BV_ceo, while GaAs HBTs cannot survive at that voltage. The conventional BV_ceo limits the average V_c of the maximum load lines, but has no influence on the peak voltage. Another BV_ceo measured with a voltage generator is proposed to represent the irreversible avalanche breakdown instead of the conventional one. A pulsed breakdown measurement is also performed to reveal the time constant of the phenomena.

High-frequency characteristics of SiGe heterojunction bipolar transistors with different emitter sizes are studied based on pulsed measurements. Because the self-heating effect in transistors will enhance the Kirk effect, as the devices operate in high current region, the measured cutoff frequency and maximum oscillation frequency decrease with measurement time in the pulsed duration. By analyzing the equivalent small-signal device parameters, we know the reduction of cutoff frequency and maximum oscillation frequency is attributed to the reduction of transconductance and the increase of junction capacitances for fixed base-emitter voltage, while it is only attributed to the degradation of transconductance for fixed collector current. Besides, the degradation of high-frequency performance due to self-heating effect would be improved with the layout design combining narrow emitter finger and parallel-interconnected subcells structure.

In this work, a simple method for extracting MOSFET threshold voltage, effective channel length and channel mobility by using S-parameter measurement is presented. In the new method, the dependence between the channel conductivity and applied gate voltage of the MOSFET device is cleverly utilized to extract the threshold voltage, while biasing the drain node of the device at zero voltage during measurement. Moreover, the effective channel length and channel mobility can also be obtained with the same measurement. Furthermore, all the physical parameters can be extracted directly on the modeling devices without relying on specifically designed test devices. Most important of all, only one S-parameter measurement is required for each device under test (DUT), making the proposed extraction method promising for automatic measurement applications.

A K-band monolithic driver amplifier with equalizer circuits has been developed. It is necessary for the equalizer circuit to be low losses in the high-frequency range and for its S21 values to increase as the operation frequency increases. In order to realize these features, it is desirable for the equalizer to have element location considering high-frequency current flows. In this paper, we present a novel low-loss, high-pass equalizer circuit layout that has superior characteristics in the high-frequency range. We used a high-pass filter as the equalizer circuit and performed a detailed evaluation of the high-frequency characteristics of the filter circuit test element groups (TEGs) for three layout types. It was found that the best filter circuit layout for the three types consisted of two capacitors and one resistor, placed with parallel connections. The resistor is located at the center and the capacitors are located at both sides of the resistor. This filter is called the CRC-type in this paper. An MMIC test sample, a K-band monolithic amplifier with CRC-type filter circuits, was fabricated. The amplifier had a gain of 21.6 dB, a Rollett stability factor K of 28.9, an input VSWR of 1.63, an output VSWR of 1.92, and a 1 dB compressed output power of 22.6 dBm at 26 GHz.

In this paper, an accurate and low-cost method for on-wafer noise figure measurement, specifically designed for low-noise amplifiers (LNAs), will be proposed. An experiment conducted on a 5 GHz LNA demonstrates that a good agreement can be reached between the measurement result of the proposed method and that of a commercial noise parameter measurement system.

A simple method has been proposed for the measurement of the output power and phase characteristics of the 3rd-order inter-modulation distortion (IM3) components appearing in multistage power amplifiers. By adopting a unique definition of the phase for the IM3 components that is independent of the delay time caused by transmission lines and other instrument devices, it is possible to measure the phase, merely by using a vector signal analyzer. It is demonstrated that an accurate estimation of the IM3 characteristics of two-stage cascaded power amplifiers for cellular radio handheld terminals can be made by using the IM3 characteristics of the 1st and 2nd-stage amplifiers as measured by the proposed method. The results indicate that it is possible to reduce the dissipation power by 18% at 28 dBm RF output power with respect to conventional measurement methods. Further studies show that the error in the resultant vector of the estimated IM3 is less than 1 dB, when the asymmetry characteristics of the IM3 sidebands in the 2nd-stage amplifier are less than 7.3%.

In this paper, we propose a simple and accurate transfer function model of the power amplifiers for mobile communications. Detail analysis yields a generalized model for AM/AM characteristics in classes AB, B, and C. The analysis includes the effect of drain current variation with input level variation. This model introduces a loadline variation ratio to indicate the change of drain current and to represent the operation classes in a small signal region. Further discussion leads to simplified approximate equations for the AM/AM characteristics, and the estimation procedures for the simplified model parameters. Using the derived procedures, an efficient power amplifier employing pseudomorphic high electron mobility transistor (PHEMT) is fabricated for the 2 GHz band. Finally, the various characteristics given by the model, simulator and measurements are compared and found to agree well in the range of 20 dB below the saturated output level. The model is very effective for characterizing the power amplifiers that are used in linear compensation techniques such as predistortion methods, due to its severe nonlinearity of AM/AM and AM/PM characteristics.

The complex dielectric image Green's function for metal-insulator-semiconductor (MIS) technology is proposed in this paper through dielectric image method. Then the Epsilon algorithm for Pade approximation is used to accelerate the convergence of the infinite series summation resulted from the complex dielectric image Green's function. Because of the complex dielectric permittivity of semiconducting substrate, the real and imaginary part of the resulted Green's function is accelerated by Epsilon algorithm, respectively. Combined with the complex dielectric image Green's function, the frequency-dependent capacitance and conductance of the transmission lines and interconnects based on MIS technology are investigated through the method of moments (MoM). The computational results of our method for 2-D and 3-D extraction examples are well agreement with experimental data gained from chip measurement and other methods such as full-wave analysis and FastCap.

In this era of System-On-a-Chip (SOC) technology, a designable initial state is required. Thus, embedding low voltage and low power Power-On-Reset (POR) circuit on the SOC chip is important for the portable device. This paper proposes a new POR circuit with process and temperature compensations. A band-gap reference is used in this circuit to reduce the effect of the temperature and process variations. With 200 mV hysteretic design provides robust noise immunity against voltage fluctuations on the power supply. The POR circuit has been designed, simulated, and implemented. A test chip has been fabricated by using 0.18 µm single-poly triple-metal CMOS logical process. Measurement results show the rise threshold voltage V_rr has only a 3% variation under the temperature range from -40 to 125. The power consumption is 39 mW at the 1.8 V power supply. The chip size of the POR is 62 mm280 mm. Thus, this POR circuit has a great potential to apply to a low power supply system.

A band-pass delta-sigma modulator (BPDSM) is a key building block to implement a digital intermediate frequency (IF) receiver in a wireless communication system. This paper proposes a time-interleaved (TI) switched-capacitor (SC) BPDSM architecture that consists of 5-stage TI blocks with recursive loop. The proposed TI BPDSM provides reduction in the clock frequency requirement by a factor of 5 and relaxes the settling time requirement to one-fourth of conventional approach. The test chip was designed and fabricated for a 30-MHz IF system with a 0.35-µm CMOS process. The measured peak SNR for a 200-kHz bandwidth is 63 dB while dissipating 75 mW from a 3.3-V supply and occupying 1.3 mm².

This paper describes an adaptive fingerprint-sensing scheme for a user authentication system with a fingerprint sensor LSI to obtain high-quality fingerprint images suitable for identification. The scheme is based on novel evaluation indexes of fingerprint-image quality and adjustable analog-to-digital (A/D) conversion. The scheme adjusts dynamically an A/D conversion range of the fingerprint sensor LSI while evaluating the image quality during real-time fingerprint-sensing operation. The evaluation indexes pertain to the contrast and the ridgelines of a fingerprint image. The A/D conversion range is adjusted by changing quantization resolution and offset. We developed a fingerprint sensor LSI and a user authentication system to evaluate the adaptive fingerprint-sensing scheme. The scheme obtained a fingerprint image suitable for identification and the system achieved an accurate identification rate with 0.36% of the false rejection rate (FRR) at 0.075% of the false acceptance rate (FAR). This confirms that the scheme is very effective in achieving accurate identification.

This paper proposes a sensing and a precharge circuit schemes suitable for low-voltage and high-speed DRAM design. The proposed offset-compensated direct sensing scheme improves refresh characteristics as well as speed performance. To minimize the number of control switches for the offset compensation, only the output branches of differential amplifiers are implemented in each bit-line pair with a semi-global bias branch, which also reduces 50-percent of bias current. The addition of the direct sensing feature to the offset-compensated pre-sensing dramatically increases the differential current output. For the fast bit-line equalization, a charge-recycled precharge scheme is proposed to reuse VPP discharging current for the generation of a boosted bias without additional charge pumping. The two circuit schemes were verified by the implementation of a 256 Mb SDRAM with a 0.1 µm dual-doped poly-silicon technology.

A CMOS DFE (decision feedback equalization) receiver with a clock-data skew compensation was implemented for the SSTL (stub-series terminated logic) SDRAM interface. The receiver consists of a 2 way interleaving DFE input buffer for ISI reduction and a X2 over-sampling phase detector for finding the optimum sampling clock position. The measurement results at 1.2 Gbps operation showed the increase of voltage margin by about 20% and the decrease of time jitter in the recovered sampling clock by about 40% by equalization in an SSTL channel with 2 pF 4 stub load. Active chip area and power consumption are 3001000 µm² and 142 mW, respectively, with a 2.5 V, 0.25 µm CMOS process.

We presented a wall charge controlled ac PDP driving method which has advantages of less number of sub-fields and no dynamic false contours compared to the conventional driving method. In this method, a sub-field exhibited different light intensity according to the initial wall charge quantity set during the address period. Even though one can set 10 different wall charge states by changing the data pulse widths, we decided to define three states, 'on,' 'half-on,' and 'off.' By adding one state, the number of sub-field required to achieve 243 gray levels was reduced from 8 to 5. Furthermore, one can realize seven sub-fields, 255 gray level, complete stretched-out coding with which one can eliminate the dynamic false contours. Since this method can reduce number of sub-fields, it is suitable for higher resolution PDP's with more scan lines.

We propose a burst optical packet generator based on a novel photonic parallel-to-serial conversion scheme, and demonstrate 40-Gbit/s 16-bit optical packet generation from 16-ch parallel low-voltage TTL data streams. It consists of electrical 4:1 parallel-to-serial converters that employ InP metal-semiconductor-metal photodetectors, and an optical time-domain multiplexer with electroabsorption modulators. The proposed optical packet generator is suitable for burst optical packet generation and overcomes the electronic bandwidth limitation, which is prerequisite for achieving high-speed photonic packet switched networks. In addition, it can be driven by simple low-cost low-power CMOS logic circuits, and is compact and extensible in terms of the number of input channels due to the effective combination of electrical and optical multiplexing.

Finite-ground microstrip line (FGMSL) open-end discontinuities are characterized via a self-calibrated method of moments (MoM) as a unified circuit model with a fringing capacitance and radiation conductance. By integrating the short-open calibration (SOC) procedure into a determinant MoM, the model parameters are extracted without needing the alternative port impedance. Regardless of non-ideal voltage sources, extracted parameters are observed to achieve a stable convergence as the feeding line is sufficiently extended. After extracted capacitance of a FGMSL open-end with equal strip and finite-ground widths are validated against its traditional MSL counterpart with infinite ground, extensive results are given to originally demonstrate that the capacitance increases as a decelerated function of the finite-ground width and length while the conductance is negligibly small as compared with its imaginary part.

A random number generator composed of single electron devices is presented. Due to stochastic behavior of electron tunneling process, single electron devices have intrinsic randomness. Using its randomness, a true random number generator can be implemented. Although fluctuation of device parameters degrades the performance of the proposed circuit, we show that the adjustment of the bias voltages can compensate the fluctuation.