Technologies used to characterize and compensate nonlinearities in microwave power amplifiers are discussed. First, a complex power series representation that allows both amplitude and phase nonlinearities to be dealt with simultaneously is proposed, and in order to estimate the 3rd-order complex coefficient phase of practical amplifiers, two kinds of experimental measurement methods are proposed. Next, the fundamental circuit configuration of IF cuber predistortion linearizer that compensates 3rd-order intermodulation distortion is derived from a nonlinear analysis using complex power series representation. Two practical cuber predistorters for the 6-GHz TWTA and the 800-MHz FET-PA are demonstrated. Moreover, the unique nonlinear compensation technology of side-band inversion is introduced for microwave relay system using TWTAs. Finally, the self-adjusting feed-forward (SAFF)-PA developed for digital cellular base stations is reviewed.

This paper presents a novel distortion compensation technique using an active inductor. First, we describe the input-reflection-coefficient characteristics of a GaAs MESFET active inductor when input power increases. We show that the inductor exhibits positive amplitude deviation and negative/positive phase deviation as the input power increases when the biases of the FETs are set appropriately. The chip size of the fabricated active inductor is less than 0.52 mm². Then, we show that third-order intermodulation is improved when the active inductor is used as a predistortion linearizer. Third-order intermodulation was improved over the output range from 14 dBm to 25 dBm, and at the output of 15 dBm, third-order intermodulation was improved approximately by 9 dB when the predistortion linearizer was introduced. The active inductor can thus function as a miniaturized predistortion linearizer by using it in the input matching circuit of a power amplifier. This technique can be applied in the miniaturization of wireless communication devices.

Even though BiCMOS process has an ability to make both BJT and MOSFET on single-chip, only BJT has been used for BiCMOS Si-MMIC LNA because of its low noise and high gain performance under low d. c. supply power. But the distortion performance of BJT should be improved for the receiver applications in some wireless systems. In this paper, intermodulation distortion characteristics comparison is carried out between BJT and MOSFET fabricated in the same BiCMOS process by the analysis based on the simplified transistor models with extracted device parameters. The analytical result shows that MOSFET has lower intermodulation distortion characteristics compared with BJT, and the result is evaluated by the measurements. In order to obtain both low distortion and low noise characteristics, a two-stage Si-MMIC LNA is developed by using BJT as the 1st stage and MOSFET as the 2nd stage of LNA. The fabricated LNA performs NF of 2.45 dB, gain of 19.3 dB, IIP₃ of14.6 dBm and OIP₃ of 4.7 dBm under 3 V/7.2 mA d. c. supply power.

This paper describes the distortion characteristics of an even harmonic type direct converter (EH-DC) used in earth stations for CDMA satellite communications. Direct conversion technique is known as a method to simplify circuit topologies of microwave transceivers. In satellite communications, multi carriers which have high and nearly equal level are provided to a quadrature mixer of the EH-DC. Hence, the third-order intermodulation degrades receiving characteristics. In this paper, we show the relationship between the distortion characteristics and noise figure of the EH-DC for CDMA satellite communication systems. Furthermore, we show NPR of even harmonic quadrature mixers caused by the third-order intermodulation. Experimental results in X-band indicate that the proposed EH-DC has almost the same BER characteristics compared with a heterodyne type transceiver.

The architecture and control procedure for a direct conversion receiver are investigated for a linear modulation scheme. The proposed design techniques maintain receiver linearity despite various types of signal distortion. The techniques include the fast gain control procedure for receiving a control channel for air interface connection, DC offset canceling in both analog and digital stages, and 2nd-order intermodulation distortion canceling in an analog down-conversion stage. Experimental and computer simulation results on PHS (Personal Handy-phone System) parameters, showed that required linear modulation performance was achieved and thus the applicability of the proposed techniques was demonstrated.

We have demonstrated the single-chip RF front-end GaAs MMIC for the Japanese Personal Handy-phone System. It has a high efficiency HPA, a T/R switch, a LNA and a low-distortion down converter mixer. The IC employs a negative voltage generator for use of single voltage DC power supply. The HPA provides an output power of 21.5 dBm, with an ACPR of 55 dBc and an efficiency of 35%. The LNA has a noise figure of 1.6 dB and a gain of 14 dB with current of 2.3 mA. The newly developed active cascode FET mixer has a high IIP3 of 1 dBm with a high conversion gain of 10 dB and low consumption current of 2.3 mA. The IC is characterized by high performance for RF front-end of PHS handheld terminals. The IC is available in a 7.0 mm6.4 mm1.1 mm plastic package.

Second harmonic signal feedback technique is applied to an HBT power amplifier for Wide-band CDMA (W-CDMA) mobile communication system to improve its linearity and efficiency. This paper describes the feedback effect of the 2nd harmonic signal from the output of the amplifier to the input on the 3rd order intermodulation distortion (IMD) products and Adjacent Channel leakage Power (ACP) of the power amplifier. The feedback amplifier, using an InGaP/GaAs HBT with 48 fingers of 3 20 µ m emitter, exhibits a 10 dB reduction in the level of the 3rd order IMD products. In addition, an ACP improvement of 7 dB for the QPSK modulation signal with a chip rate of 4.096 Mcps at 1.95 GHz was realized. As a result, the amplifier achieves a power-added efficiency of 41.5%, gain of 15.3 dB, and ACP of 43.0 dBc at a 5 MHz offset frequency and output power of 27.5 dBm. At the output power of 28 dBm, the power-added efficiency increases to 43.3% with an ACP of 40.8 dBc.

This paper describes a high-power and low-distortion AlGaAs/GaAs HFET amplifier developed for digital cellular base station system. We proved experimentally that distortion characteristics such as IMD (Intermodulation Distortion) or NPR (Noise Power Ratio) are drastically degraded when the absolute value of the drain bias circuit impedance at low frequency are high. Based on the experimental results, we have designed the drain bias circuit not to influence the distortion characteristics. The developed amplifier employed two pairs of pre-matched GaAs chips mounted on a single package and the total output-power was combined in push-pull configuration with a microstrip balun circuit. The push-pull amplifier demonstrated state-of-the-art performance of 140 W output-power with 11.5 dB linear gain at 2.2 GHz. In addition, it exhibited extremely low distortion performance of less than 30 dBc at two-tone total output-power of 46 dBm. These results indicate that the design of the drain bias circuit is of great importance to achieve improved IMD characteristics while maintaining high power performance.

This paper proposes a new distortion analysis method for frequency-dependent FET amplifiers, which uses a novel Frequency-Dependent Complex Power Series (FDCPS) model. This model consists of a frequency-independent nonlinear amplifier represented by an odd-order complex power series and frequency-dependent input and output filters. The in-band frequency characteristics of the saturation region are represented by the frequency-dependent output filter, while the in-band frequency characteristics of the linear region are represented by the frequency-dependent input and output filters. In this method, the time-domain analysis is carried out to calculate the frequency-independent nonlinear amplifier characteristics, and the frequency-domain analysis is applied to calculate the frequency-dependent input and output filter characteristics. The third-order intermodulation (IM3) calculated by this method for a GaAs MESFET amplifier is in good agreement with the numerical results obtained by the Harmonic Balance (HB) method. Moreover, the IM3 calculated by this method also agrees well with the measured data for an L-band 3-stage GaAs MESFET amplifier. It is shown that this method is effective for calculating frequency-dependent distortion of a nonlinear amplifier with broadband modulation signals.

This paper describes amplification with improved linearity by employing a linearizing circuit in an input circuit of an internally-matched Ku-band high power amplifier. The linearizing circuit is composed of series L, C, R and an FET with grounded source and drain, and is connected between the input signal line and ground. This linearizing circuit was applied to a Ku-band 10 W output power amplifier utilizing a 25.2 mm gate-width double-doped Heterojunction FET. The power amplifier demonstrated a 8 dB reduction of the third-order intermodulation at about 6 dB output power backoff point from the 2 dB output compression point.

In this paper, a four-quadrant analog multiplier consisting of four neuron-MOS transistors and two load resistors is proposed. The proposed multiplier can be operated at only 1 V. Furthermore, the input range of the multiplier is equal to 100% of the supply voltage. The theoretical harmonic distortion caused by mobility degradation and device mismatchs is derived in detail. The performance of the proposed multiplier is characterized through HSPICE simulations with a standard 2.0 µm CMOS process with a double-poly layer. Simulations of the proposed multiplier demonstrate that the linearity error of 0.77% and a total harmonic distortion of 0.62% are obtained with full-scale input conditions. The maximum power consumption and 3 dB bandwidth are 9.56 µW and 107 MHz, respectively. The active area of the proposed multiplier is 210 µm 140 µm.

We propose and describe a new configuration for splitting and combining operations of high-speed amplitude-modulated optical signals between the two interacting beams by using two-wave mixing in photorefractive Cu-doped (K_0.5 Na_0.5)_0.2 (Sr_0.61 Ba_0.39)_0.9 Nb₂O₆ (Cu-KNSBN) crystal. These operations are simultaneously achieved by changing the intensity ratio of the two incident beams. We also apply this scheme to a photorefractive pulse shaping in the time domain that consists of two amplitude-modulated beams that are coupled automatically through two-beam interactions in the crystal. Some preliminary experimental results are presented and discussed.

The magnetic shielding performance of the high-Tc superconducting (HTS) plate in a mixed state has been investigated numerically. By taking account of the crystallographic anisotropy of the HTS plate, the axisymmetric shielding plate is assumed to have a multiple thin-layer structure. Under the assumptions, the governing equations of the shielding current density can be expressed in terms of a scalar function. The numerical code to integrate the equation has been developed and, by use of the code, the shielding current density and the damping coefficient are calculated for the axisymmetric HTS plate in a mixed state. The results of computations show that the shielding current density localizes around the edge under the high-frequency magnetic field. With an increasing frequency of the applied magnetic field, the localization becomes remarkable and the shielding current density becomes larger until the flux flow occurs. In addition, the magnetic shielding performance of the HTS plate drastically changes with time under the low-frequency magnetic field below 100 Hz, whereas it is almost time-independent under the high-frequency magnetic field. Moreover, it turns out that the HTS plate can shield ac magnetic fields with a high frequency even if it remains in a mixed state.

We propose an H-plane manifold-type triplexer with closely arranged junctions. Broadband characteristics for each bands are obtained by arranging filters closely near the end of the common waveguide. Three fundamental and sufficient parameters are introduced for numerical optimizations to determine the configuration of the broadband triplexer. The configuration including closely arranged junctions requires an generalized scattering matrix (GS matrix) of an asymmetric cross junction to simulate and design. We expand the mode matching technique (MMT) to be able to analyze this kind of discontinuities by joining two asymmetric steps discontinuities to a symmetric cross junction. This is suitable expressions for numerical calculations. The characteristics of the whole triplexer are obtained by cascading GS matrices of the corresponding discontinuities. The experimental results of the fabricated triplexer were compared with the simulated data, and the results agree well with the simulated one. The characteristics of the fabricated triplexer satisfy the request of the broad band operation and high power-handling capability.

An on-chip high voltage generator applicable to low voltage flash memory is introduced. Bootstrapped gate transfer switches of two parallel paths suppress the voltage loss due to threshold voltage drop of transfer transistors. The simulated results demonstrate that proposed circuit designed with NMOS transistors having 0.8 volt threshold voltage works like an ideal charge pump circuit near 1.0 volt range with enough current driving capability.