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IEICE TRANSACTIONS on Fundamentals

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Advance publication (published online immediately after acceptance)

Volume E84-A No.6  (Publication Date:2001/06/01)

    Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000)
  • FOREWORD

    Masao HOTTA  

     
    FOREWORD

      Page(s):
    1361-1361
  • The Handover Algorithm that Considers the User's Mobility Pattern in Wireless ATM

    Hoon-ki KIM  Jae-il JUNG  

     
    PAPER

      Page(s):
    1362-1369

    This paper suggests the way to perform the handover by predicting the movement route of the mobile terminal by considering the movement pattern of the user. By considering the fact that the most users has the constant movement pattern, the channels needed for the handover can be reserved, and the required quality of service (QoS) is maintained during handover. The suggested algorithm makes the channel allocation schemes more efficient.

  • Comparison between S-CDMA and TDMA for Cable Modem Upstream Channel

    Kiyun KIM  Hyounggeun LEE  Pansoo KIM  Byunghak CHO  Hyungjin CHOI  

     
    PAPER

      Page(s):
    1370-1377

    In this paper, we compare the major issues associated with TDMA and S-CDMA (Synchronous-Code Division Multiple Access), which is considered as a new cable modem standard technology for upstream channel. We mainly deal with the following 3 topics: MAC protocol, modem structure and BER (Bit Error Rate) performance comparison between TDMA and S-CDMA. Especially, we derive BER of TDMA and S-CDMA schemes in the ε-mixture impulse noise model which appropriately reflects impulse noise characteristics of the upstream channel by using various parameters.

  • Effective Recovery Algorithm from Multiple Packet Losses in the Start-Up Behavior for TCP over ATM-UBR Service

    Woochool PARK  Sangjun PARK  Byungho RHEE  

     
    PAPER

      Page(s):
    1378-1382

    This paper proposes two modes of the congestion control scheme to improve its behavior during the start-up period of networks in current TCP over ATM-UBR implementation. The proposed two modes are a single packet loss mode and a multiple packet losses mode. The proposed algorithm is to minimize the number of cell losses in the ATM switch during specially the start-up period. During the start-up period, multiple packet losses often happens because a TCP sender starts with default parameters. It often ends up sending too many packets and too fast, leading to multiple losses is packet burstiness which occurs right after fast recovery ends. We analyze the transition behavior during fast recovery algorithm and estimate the number of new packets sent when multiple packet losses detected. We present a simple simulation model and numerical results to investigate its performance of the proposed algorithms.

  • Multiuser Detection Based on Radial Basis Function for a Multicode DS/CDMA System

    Jin Young KIM  

     
    PAPER

      Page(s):
    1383-1391

    In this paper, multiuser detector (MUD) based on radial basis function (RBF) is proposed and simulated for a multicode DS/CDMA system in an AWGN and a multipath fading channels. The performance of RBF-based MUD is compared with that of many suboptimal multiuser detectors in terms of bit error probability. To obtain simulation results, importance sampling technique is employed. From the simulation results, it is confirmed that the RBF-based MUD outperforms decorrelating detector, and achieves near-optimum performance under various environments. The results in this paper can be applied to design of MUD for a multicode DS/CDMA system.

  • Context-Free Marker-Controlled Watershed Transform for Efficient Multi-Object Detection and Segmentation

    Kyung-Seok SEO  Chang-Joon PARK  Sang-Hyun CHO  Heung-Moon CHOI  

     
    PAPER

      Page(s):
    1392-1400

    A high-speed context-free marker controlled and minima imposition-free watershed transform is proposed for efficient multi-object detection and segmentation from a complex background. The context-free markers are extracted from a complex backgrounded multi-object image using a noise tolerant attention operator. These make high speed marker-controlled watershed possible without over-segmentation and region merging. The proposed method presents a marker-constrained labeling that can speed up the segmentation of the marker-controlled watershed transform by eliminating the necessity of the minima imposition. Simulation results show that the proposed method can efficiently detect and segment multiple objects from a complex background while reducing the over-segmentation and computation time.

  • An Improved Voice Activity Detection Algorithm Employing Speech Enhancement Preprocessing

    Yoon-Chang LEE  Sang-Sik AHN  

     
    PAPER

      Page(s):
    1401-1405

    In this paper, we first propose a new speech enhancement preprocessing algorithm by combining power subtraction method and maximal ratio combining technique, then apply it to both energy-based and statistical model-based VAD algorithm to improve the performance even in low SNR conditions. We also perform extensive computer simulations to demonstrate the performance improvement of the proposed VAD algorithm employing the proposed speech enhancement preprocessing algorithm under various background noise environments.

  • Joint Erlang Capacity of DS/CDMA Forward Link Based on Resource Sharing Algorithm

    Wan CHOI  Jin Young KIM  

     
    PAPER

      Page(s):
    1406-1412

    In future mobile communication systems, forward link may be a limiting one because emerging data services are likely to require higher data rates in the forward link than in the reverse link. In this paper, we derive joint Erlang capacity of a DS/CDMA forward link in terms of both outage probability and blocking probability for each type of traffic in a mixed traffic environment. Resource sharing algorithm and generalized Erlang model are employed to derive joint Erlang capacity of the DS/CDMA system with various types of traffics. The joint Erlang capacity reflecting both outage probability and blocking probability of each type of traffic is obtained by an approach based on virtual circuit switching perspective. We take into account effect of closed loop power control in the analysis. From numerical results, it is confirmed that blocking probability as a QoS (quality of service) parameter has a significant impact on the forward link capacity. The results of this paper can be applied to design of the DS/CDMA systems supporting wireless multimedia traffics.

  • Efficient Incremental Query Processing via Vantage Point Filtering in Dynamic Multi-Dimensional Index Structures

    Byung-Gon KIM  Sam Hyuk NOH  DoSoon PARK  Haechull LIM  Jaeho LEE  

     
    PAPER

      Page(s):
    1413-1422

    Efficient query processing in multi-dimensional indexing structures is an important issue for multimedia data applications. In this paper, we propose incremental k-nearest neighbor query (k-NNQ) and range query algorithms for R-tree based structures. The novel aspect of these algorithms is that they make use of the notion of VP filtering, a concept borrowed from the MVP-tree. The filtering notion allows for delaying of computational overhead until absolutely necessary. By so doing, we attain considerable performance benefits while paying insignificant overhead during the construction of the index structure. We implemented our algorithms and carried out experiments to demonstrate the capability and usefulness of our method. Results show that improvements range from 8% to 23% in response time for the experimental environment that we considered.

  • 3D Acoustic Image Localization Algorithm by Embedded DSP

    Wataru KOBAYASHI  Noriaki SAKAMOTO  Takao ONOYE  Isao SHIRAKAWA  

     
    PAPER

      Page(s):
    1423-1430

    This paper describes a realtime 3D sound localization algorithm to be implemented with the use of a low power embedded DSP. A distinctive feature of this implementation approach is that the audible frequency band is divided into three, in accordance with the analysis of the sound reflection and diffraction effects through different media from a certain sound source to human ears. In the low, intermediate, and high frequency subbands, different schemes of the 3D sound localization are devised by means of an IIR filter, parametric equalizers, and a comb filter, respectively, so as to be run realtime on a low power embedded DSP. This algorithm aims at providing a listener with the 3D sound effects through headphones at low cost and low power consumption.

  • Fast Algorithm for Online Linear Discriminant Analysis

    Kazuyuki HIRAOKA  Masashi HAMAHIRA  Ken-ichi HIDAI  Hiroshi MIZOGUCHI  Taketoshi MISHIMA  Shuji YOSHIZAWA  

     
    PAPER

      Page(s):
    1431-1441

    Linear discriminant analysis (LDA) is a basic tool of pattern recognition, and it is used in extensive fields, e.g. face identification. However, LDA is poor at adaptability since it is a batch type algorithm. To overcome this, new algorithms of online LDA are proposed in the present paper. In face identification task, it is experimentally shown that the new algorithms are about two times faster than the previously proposed algorithm in terms of the number of required examples, while the previous algorithm attains better final performance than the new algorithms after sufficient steps of learning. The meaning of new algorithms are also discussed theoretically, and they are suggested to be corresponding to combination of PCA and Mahalanobis distance.

  • Analytical Models and Performance Analyses of Instruction Fetch on Superscalar Processors

    Sun-Mo KIM  Jung-Woo LEE  Soo-Haeng LEE  Sang-Bang CHOI  

     
    PAPER

      Page(s):
    1442-1453

    Cache memories are small fast memories used to temporarily hold the contents of main memory that are likely to be referenced by processors so as to reduce instruction and data access time. In study of cache performance, most of previous works have employed simulation-based methods. However, that kind of researches cannot precisely explain the obtained results. Moreover, when a new processor is designed, huge simulations must be performed again with several different parameters. This research classifies cache structures for superscalar processors into four types, and then represents analytical model of instruction fetch process for each cache type considering various kinds of architectural parameters such as the frequency of branch instructions in program, cache miss rate, cache miss penalty, branch misprediction frequency, and branch misprediction penalty, and etc. To prove the correctness of the proposed models, we performed extensive simulations and compared the results with the analytical models. Simulation results showed that the proposed model can estimate the expected instruction fetch rate accurately within 10% error in most cases. This paper shows that the increase of cache misses reduces the instruction fetch rate more severely than that of branch misprediction does. The model is also able to provide exact relationship between cache miss and branch misprediction for the instruction fetch analysis. The proposed model can explain the causes of performance degradation that cannot be uncovered by the simulation method only.

  • Fast Matching Pursuit Method Using Property of Symmetry and Classification for Scalable Video Coding

    Seokbyoung OH  Byeungwoo JEON  

     
    PAPER

      Page(s):
    1454-1460

    Matching pursuit is a signal expansion technique whose efficiency for motion compensated residual image has been successfully demonstrated in the MPEG-4 development. However, one of the practical concerns related to applying matching pursuit algorithm to real-time coding of video is its massive computation required for finding atoms. This paper proposes a new fast method based on three properties of basis functions used in the signal expansion. The first one is the symmetry property of the 1-D bases. The second one is that one can preclude many bases that cannot be atom by checking a simple mathematical condition. The last one is the classification property of 2-D bases in a given dictionary. Experimental result shows that our method can perform the same matching pursuit without any image degradation using only about 40% of computational load required by the conventional fast method based on separability of 2-D Gabor dictionary. Furthermore, if negligible quality degradation is allowed, the method can be extended to perform matching pursuit with only about 10% of the computational load required by the conventional fast method. We apply the proposed fast matching pursuit method to scalable coding of video with two layers.

  • Vision Based Vehicle Detection and Traffic Parameter Extraction

    Mei YU  Yong-Deak KIM  

     
    PAPER

      Page(s):
    1461-1470

    Various shadows are one of main factors that cause errors in vision based vehicle detection. In this paper, two simple methods, land mark based method and BS & Edge method, are proposed for vehicle detection and shadow rejection. In the experiments, the accuracy of vehicle detection is higher than 98%, during which the shadows arisen from roadside buildings grew considerably. Based on these two methods, vehicle counting, tracking, classification, and speed estimation are achieved so that real-time traffic parameters concerning traffic flow can be extracted to describe the load of each lane.

  • Specification and Verification of a Single-Track Railroad Signaling in CafeOBJ

    Takahiro SEINO  Kazuhiro OGATA  Kokichi FUTATSUGI  

     
    PAPER

      Page(s):
    1471-1478

    A signaling system for a single-track railroad has been specified in CafeOBJ. In this paper, we describe the specification of arbitrary two adjacent stations connected by a single line that is called a two-station system. The system consists of two stations, a railroad line (between the stations) that is also divided into some contiguous sections, signals and trains. Each object has been specified in terms of their behavior, and by composing the specifications with projection operations the whole specification has been described. A safety property that more than one train never enter a same section simultaneously has also been verified with CafeOBJ.

  • A High-Speed Multiplier-Free Realization of IIR Filter Using ROM's and Elevated Signal Rate

    Thanyapat SAKUNKONCHAK  Sawasd TANTARATANA  

     
    PAPER

      Page(s):
    1479-1487

    In this paper, we propose a high-speed multiplier-free realization using ROM's to store the results of coefficient scalings in combination with higher signal rate and pipelined operations, without the need of hardware multipliers. By varying some parameters, the proposed structure provides various combinations of hardware and clock speed (or throughput). Examples are given comparing the proposed realization with the distributed arithmetic (DA) realization and direct-form realization with power-of-two coefficients. Results show that with proper choices of the parameters the proposed structure achieves a faster processing speed with less hardware, as compared to the DA realization, while it is much faster than the direct-form with slightly more hardware.

  • Testable Static CMOS PLA for IDDQ Testing

    Masaki HASHIZUME  Hiroshi HOSHIKA  Hiroyuki YOTSUYANAGI  Takeomi TAMESADA  

     
    PAPER

      Page(s):
    1488-1495

    A new IDDQ testable design method is proposed for static CMOS PLA circuits. A testable PLA circuit of NOR-NOR type is designed using this method. It is shown that all bridging faults in NOR planes of the testable designed PLA circuit can be detected by IDDQ testing with 4 sets of test input vectors. The test input vectors are independent of the logical functions to be realized in the PLA circuit. PLA circuits are designed using this method so that the quiescent supply current generated when they are tested will be zero. Thus, high resolution of IDDQ tests for the PLA circuits can be obtained by using the testable design method. Results of IDDQ tests of PLA circuits designed using this testable design method confirm not that the expected output can be generated from the circuits but that the circuits are fabricated without bridging faults in NOR planes. Since bridging faults often occur in state-of-the-art IC fabrication, the testable design is indispensable for realizing highly reliable logic systems.

  • Proposition and Evaluation of Parallelism-Independent Scheduling Algorithms for DAGs of Tasks with Non-Uniform Execution Times

    Kirilka NIKOLOVA  Atusi MAEDA  Masahiro SOWA  

     
    PAPER

      Page(s):
    1496-1505

    A parallel program with a fixed degree of parallelism cannot be executed efficiently, or at all, by a parallel computer with a different degree of parallelism. This will cause a problem in the distribution of software applications in the near future when parallel computers with various degrees of parallelism will be widely used. In this paper we propose a way to make the machine code of the programs parallelism-independent, i.e. executable in minimum time on parallel computers with any degree of parallelism. We propose and evaluate three parallelism-independent scheduling algorithms for direct acyclic graphs (DAGs) of tasks with non-uniform execution times. To prove their efficiency, we performed simulations both with random DAGs and DAGs extracted from real applications. We evaluate them in terms of schedule length, computation time and size of the scheduled program. Their results are compared to those of the traditional CP/MISF algorithm which is used separately for each number of processors.

  • Test Generation for SI Asynchronous Circuits with Undetectable Faults from Signal Transition Graph Specification

    Eunjung OH  Jeong-Gun LEE  Dong-Ik LEE  Ho-Yong CHOI  

     
    PAPER

      Page(s):
    1506-1514

    In this paper, we propose an approach to test pattern generation for Speed-Independent (SI) asynchronous control circuits. Test patterns are generated based on a specified sequence, which is derived from the specification of a target circuit in the form of a Signal Transition Graph (STG). Since the sequence represents the behavior of a circuit only with stable states, the state space of the circuit can be represented as reduced one. A product machine, which consists of a fault-free circuit and a faulty circuit, is constructed and then the specified sequence is applied sequentially to the product machine. A fault is detected when the product machine produces inconsistency, i.e., output values of a fault-free circuit and a faulty circuit are different, and the sequentially applied part of the sequence becomes a test pattern to detect the fault. We also propose a test generation method using an undetectable fault identification as well as the specified sequence. Since the reduced state space is a subset of that of a gate level implementation, test patterns based on a specification cannot detect some faults. The proposed method identifies those faults with a circuit topology in advance. BDD is used to implement the proposed methods efficiently, since the proposed methods have a lot of state sets and set operations. Experimental results show that the test generation using a specification achieves high fault coverage over single stuck-at fault model for several synthesized SI circuits. The proposed test generation using a circuit topology as well as a specification decreases execution time for test generation with negligible cost retaining high fault coverage.

  • ERG Signal Modeling Based on Retinal Model

    Seung-Pyo CHAE  Jeong-Woo LEE  Woo-Young JANG  Byung-Seop SONG  Myoung-Nam KIM  Si-Yeol KIM  Jin-Ho CHO  

     
    PAPER

      Page(s):
    1515-1524

    An electroretinogram (ERG) represents the global responses of the retina to a visual stimulus and shows accumulated responses of each layer of the retina relative to the signal processing mechanisms occurring within the retina. Thus, investigating the reaction types of each ERG wave provides information required for diagnosis and for identifying the signal processing mechanisms in the retina. In this study, an ERG signal is generated by simulating the volume conductor field response for each retina layer, which are then summed algebraically. The retina model used for the simulation is Shah's Computer Retina model, which is the most reliable model developed so far. When the generated ERG is compared with a typical clinical ERG it exhibits a close similarity. Based on changing the parameters of the ERG model, a diagnostic investigation is performed with a variation in the ERG waveform.

  • A Simple Scheduling Algorithm Guaranteeing Delay Bounds in ATM Networks

    Jae-Jeong SHIM  Jae-Young PYUN  Sung-Jea KO  

     
    LETTER

      Page(s):
    1525-1528

    A new scheduling algorithm called the Adaptive Weighted Round Robin with Delay Tolerance (AWRR/DT) is presented. This scheme can adapt to the traffic fluctuation of networks with a small processing burden. The proposed scheme incorporates a cell discarding method to reduce the QoS degradation in high-loaded (or congested) period. Simulation results show that the proposed scheme can reduce the average delay of the non-real-time (NRT) class, especially in high-loaded conditions, while maintaining the QoS of real-time (RT) classes. Our scheme with the discarding method can also reduce both the mean waiting time and cell loss ratio of RT classes.

  • Motion Estimation with Optical Flow-Based Adaptive Search Region

    Kyoung-Kyoo KIM  Seong-Won BAN  Kuhn-Il LEE  

     
    LETTER

      Page(s):
    1529-1531

    An optical flow-based motion estimation algorithm is proposed for video coding. The algorithm is based on the fact that true motion vectors have similar characteristics to optical flow vectors. The algorithm uses block matching motion estimation with an adaptive search region. The search region is computed from motion fields that are estimated based on the optical flow. The results obtained using test images show that the proposed algorithm can produce a significant improvement compared with previous optical flow algorithm and block matching algorithm.

  • A Petri Net Based Public-Key Cryptography: PNPKC

    Qi-Wei GE  Takako OKAMOTO  

     
    LETTER

      Page(s):
    1532-1535

    This paper proposes a public-key cryptography by applying RSA and Petri nets. We introduce RSA and a Petri net based private-key cryptography and then taking the advantages of these two cryptography, we propose a new public-key cryptography, PNPKC. To compare with RSA on security as well as computation order, we do simulation experiments. As the results, the security of PNPKC is as strong as RSA cryptography, and the encryption and decryption of PNPKC are in average 239 times as fast as RSA cryptography from our experiments. Besides, to see if our current PNPKC program can be practically used, we do comparative experiment with PGP, which shows PNPKC takes computation time in average as much as 36 times of PGP cryptography. That means our PNPKC program still needs to be technically improved.

  • A Note on Synthesis of a Complex Coefficient BPF Based on a Real Coefficient BPF

    Kazuhiro SHOUNO  Yukio ISHIBASHI  

     
    LETTER

      Page(s):
    1536-1540

    A complex coefficient filter obtained by directly exchanging several reactance elements included in a real coefficient BPF for imaginary valued resistors is described. By using the proposed method, we obtain four varieties of complex coefficient filters. The stability problem is examined.

  • Register Constraint Analysis to Minimize Spill Code for Application Specific DSPs

    Tatsuo WATANABE  Nagisa ISHIURA  

     
    LETTER

      Page(s):
    1541-1544

    This letter presents a method which attempts to minimize the number of spill codes to resolve usage conflicts of distributed registers in application specific DSPs. It searches for a set of ordering restrictions among operations which sequentialize the lifetimes of the values residing in the same register as much as possible. Experimental results show that the proposed analysis method reduces the number of register spills into 28%.

  • An Evolutionary Algorithm Approach to the Design of Minimum Cost Survivable Networks with Bounded Rings

    Beatrice M. OMBUKI  Morikazu NAKAMURA  Zensho NAKAO  Kenji ONAGA  

     
    LETTER

      Page(s):
    1545-1548

    This paper presents a genetic algorithm for designing at minimum cost a two-connected network topology such that the shortest cycle (referred to as a ring) to which each edge belongs does not exceed a given maximum number of hops. The genetic algorithm introduces a solution representation in which constraints such as connectivity and ring constraints are easily encoded. Furthermore, a problem specific crossover operator that ensures solutions generated through genetic evolution are all feasible is also proposed. Hence, both checking of the constraints and repair mechanism can be avoided thus resulting in increased efficiency. Experimental evaluation shows the effectiveness of the proposed GA.

  • Regular Section
  • Approximate Solution of Hamilton-Jacobi-Bellman Equation by Using Neural Networks and Matrix Calculus Techniques

    Xu WANG  Kiyotaka SHIMIZU  

     
    PAPER-Systems and Control

      Page(s):
    1549-1556

    In this paper we propose a new algorithm to approximate the solution of Hamilton-Jacobi-Bellman equation by using a three layer neural network for affine and general nonlinear systems, and the state feedback controller can be obtained which make the closed-loop systems be suboptimal within a restrictive training domain. Matrix calculus theory is used to get the gradients of training error with respect to the weight parameter matrices in neural networks. By using pattern mode learning algorithm, many examples show the effectiveness of the proposed method.

  • Robustness of Eigenvalue-Clustering in a Ring Region for Linear Perturbed Discrete Time-Delay Systems

    Chen Huei HSIEH  Jyh Horng CHOU  Ying Jeng WU  

     
    PAPER-Systems and Control

      Page(s):
    1557-1563

    In this paper, under the assumption that all the eigenvalues of a linear nominal discrete time-delay system lie within a specified ring region, a sufficient condition is proposed to preserve the assumed property when the structured parameter perturbations are added into the linear nominal discrete time-delay system. For the case of eigenvalue-clustering in a circular region, and for the case of not including time delays, the presented sufficient condition is mathematically proved to be less conservative than those reported recently in the literature.

  • A New M-PSK Code Construction with Good Minimum Euclidean Distance for AWGN Channels

    Abdussalam Ibn AHD  Hidehiko TANABE  Hiroyuki UMEDA  

     
    PAPER-Coding Theory

      Page(s):
    1564-1571

    An important goal in communication theory is to construct good minimum squared Euclidean distance (MSED) codes for transmission over additive white Gaussian noise (AWGN) channels. In this paper, a new construction method for the M-ary phase-shift-keyed (M-PSK) codes over the ring structure ZM, the ring of integers modulo M, with a good minimum Euclidean distance, is proposed. The proposed codes are linear when multiple coset leaders are considered. The characteristics and performance levels of the newly constructed codes are analyzed for code length up to n 8. It is found that the proposed codes compare favorably with Piret's codes and Graeffe's method codes on Gaussian channels in terms of decoding complexity, coding gain, and error performance.

  • An Acquisition Method Using Correlation Mapping with False Alarm Penalty in M-ary/SS Systems

    Yuuki OKAZAKI  Masanori HAMAMURA  Shin'ichi TACHIKAWA  

     
    PAPER-Spread Spectrum Technologies and Applications

      Page(s):
    1572-1580

    This paper proposes a synchronous acquisition method using correlation mapping by multiple-dwell detection considering false alarm penalty in M-ary/SS systems. In the method, first, the correlation value between a received signal and each assigned sequence in an M-ary/SS system in some short duration is calculated for each phase and stored in the mapping. Second, the maximum correlation value of each phase in the mapping is selected and arranged, then, the first probable synchronous phase is decided by the maximum one in these values. Simultaneously, data demodulation starts. Next, to recognize the synchronous phase, i.e., as considering false alarm penalty, the correlation values are calculated in longer duration, and the second probable phase with high reliability can be obtained by suppression of noise to signal level. Finally, if the second synchronous phase is different from the first one, the second one is reset. By this method, a short acquisition time and high reliability of acquisition can be achieved. The improvement of acquisition time and the optimal combination values of dwelling time, which is duration to calculate the correlation, are shown for several conditions in asynchronous M-ary/SSMA.

  • Mathematical Proof of Explicit Formulas for Tap-Coefficients of Taylor Series Based FIR Digital Differentiators

    Ishtiaq Rasool KHAN  Ryoji OHBA  

     
    LETTER-Digital Signal Processing

      Page(s):
    1581-1584

    Explicit formulas for the tap-coefficients of Taylor series based type III FIR digital differentiators have already been presented. However, those formulas were not derived mathematically from the Taylor series and were based on observation of different sets of the results. In this paper, we provide a mathematical proof of the formulas by deriving them mathematically from the Taylor series.

  • A Robust Velocity Estimation Method by Using Mixed Domain Phase Signal

    Shengli WU  Nozomu HAMADA  

     
    LETTER-Digital Signal Processing

      Page(s):
    1585-1587

    A robust moving object velocity estimation method in the mixed domain (MixeD) is proposed. By obtaining phase, that is, normalizing the 1-D complex sinusoid signals with their magnitudes, the velocity estimations of moving objects with conditions such as object rotation, shape and graylevel variation have been accomplished. Based on the appropriate spatial frequency selection, which choose the points where the signals are less influenced by the background and noise, the spectra of these 1-D temporal complex signals in selected points are estimated by FFT. The simulation results show that velocity vectors have been correctly estimated.

  • Improvement of Conventional Method of PI Fuzzy Control

    Kenichiro HAYASHI  Akifumi OTSUBO  Kazuhiko SHIRANITA  

     
    LETTER-Systems and Control

      Page(s):
    1588-1592

    The conventional method of fuzzy control realizes only nonlinear PI (proportional and integral) control actions and does not have the D (derivative) control action required to effectively improve control performance. Hence, the improvement of control performance is limited. Therefore, in this paper, a method for simple improvement of the PI fuzzy control used conventionally is proposed. The method proposed here improves the control performance simply by combining, in parallel, the conventional PI fuzzy controller with the D control action which is realized by using the fuzzy inference method. Then, based on the simulation results for the first- and second-order lag systems with dead time, the effectiveness of the proposed fuzzy control is shown compared with the conventional PI fuzzy control.

  • Coherence Resonance in Propagating Spikes in the FitzHugh-Nagumo Model

    Yo HORIKAWA  

     
    LETTER-Nonlinear Problems

      Page(s):
    1593-1596

    Coherence resonance in propagating spikes generated by noise in spatially distributed excitable media is studied with computer simulation and circuit experiment on the FitzHugh-Nagumo model. White noise is added to the one end of the media to generate spikes, which propagate to the other end. The mean and standard deviation of the interspike intervals of the spikes after propagation take minimum values at the intermediate strength of the added noise. This shows stronger coherence than obtained in the previous studies.

  • An Efficient Linear Ordering Algorithm for Netlist Partitioning

    Kwang-Su SEONG  

     
    LETTER-VLSI Design Technology and CAD

      Page(s):
    1597-1602

    In this paper, we propose an efficient linear ordering algorithm for netlist partitioning. The proposed algorithm incrementally merges two segments which are selected based on the proposed cost function until only one segment remains. The final resultant segment then corresponds to the linear order. Compared to the earlier work, the proposed algorithm yields an average of 11.4% improvement for the ten-way scaled cost partitioning.