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IEICE TRANSACTIONS on Fundamentals

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Advance publication (published online immediately after acceptance)

Volume E93-A No.9  (Publication Date:2010/09/01)

    Regular Section
  • Simple Analytical Formulas for Estimating IR-Drops in an Early Design Stage

    Kazuyuki OOYA  Yuji TAKASHIMA  Atsushi KUROKAWA  

     
    PAPER-VLSI Design Technology and CAD

      Page(s):
    1585-1593

    In an early design stage of LSI designing, finding out the proper parameters for power planning is important from the viewpoint of cost minimization. In this paper, we present simple analytical formulas which are used to obtain the initial parameters close to the proper power distribution networks in the early design stage. The formulas for estimating static and pseudo-dynamic voltage drops (IR-drops) are derived by the response surface method (RSM). By making the formulas once, they can be used for the general power planning for the power-grid style in any process technology.

  • A High-Throughput Binary Arithmetic Coding Architecture for H.264/AVC CABAC

    Yizhong LIU  Tian SONG  Takashi SHIMAMOTO  

     
    PAPER-VLSI Design Technology and CAD

      Page(s):
    1594-1604

    In this paper, we propose a high-throughput binary arithmetic coding architecture for CABAC (Context Adaptive Binary Arithmetic Coding) which is one of the entropy coding tools used in the H.264/AVC main and high profiles. The full CABAC encoding functions, including binarization, context model selection, arithmetic encoding and bits generation, are implemented in this proposal. The binarization and context model selection are implemented in a proposed binarizer, in which a FIFO is used to pack the binarization results and output 4 bins in one clock. The arithmetic encoding and bits generation are implemented in a four-stage pipeline with the encoding ability of 4 bins/clock. In order to improve the processing speed, the context variables access and update for 4 bins are paralleled and the pipeline path is balanced. Also, because of the outstanding bits issue, a bits packing and generation strategy for 4 bins paralleled processing is proposed. After implemented in verilog-HDL and synthesized with Synopsys Design Compiler using 90 nm libraries, this proposal can work at the clock frequency of 250 MHz and takes up about 58 K standard cells, 3.2 Kbits register files and 27.6 K bits ROM. The throughput of processing 1000 M bins per second can be achieved in this proposal for the HDTV applications.

  • A New LDMOS Transistor Macro-Modeling for Accurately Predicting Bias Dependence of Gate-Overlap Capacitance

    Takashi SAITO  Toshiki KANAMOTO  Saiko KOBAYASHI  Nobuhiko GOTO  Takao SATO  Hitoshi SUGIHARA  Hiroo MASUDA  

     
    PAPER-VLSI Design Technology and CAD

      Page(s):
    1605-1611

    We have developed a macro model, which allows us to describe precise LDMOS DC/AC characteristics. Characterization of anomalous gate input capacitance is the key issue in the LDMOS model development. We have newly employed a T-type distributed RC scheme for gate overlapped LDMOS drift region. The bias dependent resistance and capacitance are modeled independently in Verilog-A as R-model and PMOS-capacitance. The dividing factor of the distributed R is introduced to reflect the shield effect of the gate overlap capacitance. Comparison between the new model and measurement results has proven that the developed macro model reproduces accurately not only the gate input capacitance, but also DC characteristics.

  • Security of the Misty Structure Using Involutions as Round Functions

    Jooyoung LEE  Bonwook KOO  

     
    PAPER-Cryptography and Information Security

      Page(s):
    1612-1619

    In this paper, we study the security of the Misty structure, where each round function is chosen at random from the set of involutions. Based on the game-playing framework, we prove the pseudorandomness of the 3-round R-Misty structure and the 4-round L-Misty structure as well as the super-pseudorandomness of the 5-round R-Misty structure for m 2n/2, where m denotes the number of queries and 2n denotes the block size. We also give similar results for the Misty structures such that each round function is chosen at random from the set of involutions with a constant number of fixed points. Our results generalize the results of giving the first construction of a (strong) pseudorandom permutation based on random involutions (without any restriction on the number of fixed points), and suggest a new criterion for design of block ciphers in an involutional Misty structure that each round function should have a constant number of fixed points.

  • A Hidden Vector Encryption Scheme with Constant-Size Tokens and Pairing Computations

    Jong Hwan PARK  Dong Hoon LEE  

     
    PAPER-Cryptography and Information Security

      Page(s):
    1620-1631

    The Hidden Vector Encryption scheme is one of the searchable public key encryption schemes that allow for searching encrypted data. The Hidden Vector Encryption scheme supports conjunctive equality, comparison, and subset queries, as well as arbitrary conjunctive combinations of these queries. In a Hidden Vector Encryption scheme, a receiver generates a token for a vector of searchable components and sends the token to a query server which has the capability to evaluate it on encrypted data. All of the existing Hidden Vector Encryption schemes, which are all pairing-based, require token elements and pairing computations proportional to the number of searchable components in the token. In this paper, we suggest an improved paring-based Hidden Vector Encryption scheme where the token elements and pairing computations are independent of the number of searchable components. Namely, for an arbitrary conjunctive search query, the token is of size O(1) and the query server only needs O(1) pairing computations. The latter improvement in particular might be very attractive to a query server in a larger search system with many users. To achieve our goal, we introduce a novel technique to generate a token, which may be of independent interest.

  • BS-CPA: Built-In Determined Sub-Key Correlation Power Analysis

    Yuichi KOMANO  Hideo SHIMIZU  Shinichi KAWAMURA  

     
    PAPER-Cryptography and Information Security

      Page(s):
    1632-1638

    Correlation power analysis (CPA) is a well-known attack against cryptographic modules with which an attacker evaluates the correlation between the power consumption and the sensitive data candidates calculated from a guessed sub-key and known data such as plaintexts and ciphertexts. This paper enhances CPA to propose a new general power analysis, built-in determined sub-key CPA (BS-CPA), which finds a new sub-key by using the previously determined sub-keys recursively to compute the sensitive data candidates and to increase the signal-to-noise ratio in its analysis. BS-CPA also reuses the power traces in the repetitions of finding sub-keys to decrease the total number of the required traces for determining the all sub-keys. BS-CPA is powerful and effective when the multiple sensitive data blocks such as sbox outputs are processed simultaneously as in the hardware implementation. We apply BS-CPA to the power traces provided at the DPA contest and succeed in finding a DES key using fewer traces than the original CPA does.

  • Multimedia Multicast Based on Multiterminal Source Coding

    Ali AGHAGOLZADEH  Mahdi NOOSHYAR  Hamid R. RABIEE  Elhameh MIKAILI  

     
    PAPER-Information Theory

      Page(s):
    1639-1649

    Multimedia multicast with two servers based on the multiterminal source coding is studied in some previous researches. Due to the possibility of providing an approach for practical code design for more than two correlated sources in IMTSC/CEO setup, in this paper, the framework of Slepian-Wolf coded quantization is extended and a practical code design is presented for IMTSC/CEO with the number of encoders greater than two. Then the multicast system based on the IMTSC/CEO is applied to the cases with three, four and five servers. Since the underlying code design approach for the IMTSC/CEO problem has the capability of applying to an arbitrary number of active encoders, the proposed MMBMSC method can also be used with an arbitrary number of servers easily. Also, explicit expressions of the expected distortion with an arbitrary number of servers in the MMBMSC system are presented. Experimental results with data, image and video signals show the superiority of our proposed method over the conventional solutions and over the MMBMSC system with two servers.

  • Strongly Secure Privacy Amplification Cannot Be Obtained by Encoder of Slepian-Wolf Code

    Shun WATANABE  Ryutaroh MATSUMOTO  Tomohiko UYEMATSU  

     
    PAPER-Information Theory

      Page(s):
    1650-1659

    Privacy amplification is a technique to distill a secret key from a random variable by a function so that the distilled key and eavesdropper's random variable are statistically independent. There are three kinds of security criteria for the key distilled by privacy amplification: the normalized divergence criterion, which is also known as the weak security criterion, the variational distance criterion, and the divergence criterion, which is also known as the strong security criterion. As a technique to distill a secret key, it is known that the encoder of a Slepian-Wolf (the source coding with full side-information at the decoder) code can be used as a function for privacy amplification if we employ the weak security criterion. In this paper, we show that the encoder of a Slepian-Wolf code cannot be used as a function for privacy amplification if we employ the criteria other than the weak one.

  • A Novel Communication Range Recognition (CRR) Scheme for Spatial Localization of Passive RFID Tags

    Tomotaka WADA  Norie UCHITOMI  Yuuki OTA  Toshihiro HORI  Kouichi MUTSUURA  Hiromi OKADA  

     
    PAPER-Mobile Information Network and Personal Communications

      Page(s):
    1660-1669

    RFID (Radio Frequency Identification) technology is expected to be used as a localization tool. By the localization of RFID tags, a mobile robot equipped with an RFID reader can recognize the surrounding environment. In this paper, we propose a novel effective scheme called the communication range recognition (CRR) scheme for localizing RFID tags. In this scheme, an RFID reader determines the boundaries of the communication range when it is appropriately positioned by the robot. We evaluate the estimated position accuracy through numerous experiments. We show that the moving distance of the RFID reader in the proposed scheme is lower than that in conventional schemes.

  • Efficient Hybrid CMOS-Nano Circuit Design for Spiking Neurons and Memristive Synapses with STDP

    Ahmad AFIFI  Ahmad AYATOLLAHI  Farshid RAISSI  Hasan HAJGHASSEM  

     
    PAPER-Neural Networks and Bioengineering

      Page(s):
    1670-1677

    This paper introduces a new hybrid CMOS-Nano circuit for efficient implementation of spiking neurons and spike-timing dependent plasticity (STDP) rule. In our spiking neural architecture, the STDP rule has been implemented by using neuron circuits which generate two-part spikes and send them in both forward and backward directions along their axons and dendrites, simultaneously. The two-part spikes form STDP windows and also they carry temporal information relating to neuronal activities. However, to reduce power consumption, we take the circuitry of two-part spike generation out of the neuron circuit and use the regular shaped pulses, after the training has been performed. Furthermore, the performance of the rule as spike-timing correlation learning and character recognition in a two layer winner-take-all (WTA) network of integrate-and-fire neurons and memristive synapses is demonstrated as a case example.

  • Adaptive Arbitration of Fair QoS Based Resource Allocation in Multi-Tier Computing Systems

    Naoki HAYASHI  Toshimitsu USHIO  Takafumi KANAZAWA  

     
    PAPER-Concurrent Systems

      Page(s):
    1678-1683

    This paper proposes an adaptive resource allocation for multi-tier computing systems to guarantee a fair QoS level under resource constraints of tiers. We introduce a multi-tier computing architecture which consists of a group of resource managers and an arbiter. Resource allocation of each client is managed by a dedicated resource manager. Each resource manager updates resources allocated to subtasks of its client by locally exchanging QoS levels with other resource managers. An arbiter compensates the updated resources to avoid overload conditions in tiers. Based on the compensation by the arbiter, the subtasks of each client are executed in corresponding tiers. We derive sufficient conditions for the proposed resource allocation to achieve a fair QoS level avoiding overload conditions in all tiers with some assumptions on a QoS function and a resource consumption function of each client. We conduct a simulation to demonstrate that the proposed resource allocation can adaptively achieve a fair QoS level without causing any overload condition.

  • Efficient Speech Reinforcement Based on Low-Bit-Rate Speech Coding Parameters

    Jae-Hun CHOI  Joon-Hyuk CHANG  Seong-Ro LEE  

     
    LETTER-Speech and Hearing

      Page(s):
    1684-1687

    In this paper, a novel approach to speech reinforcement in a low-bit-rate speech coder under ambient noise environments is proposed. The excitation vector of ambient noise is efficiently obtained at the near-end and then combined with the excitation signal of the far-end for a suitable reinforcement gain within the G.729 CS-ACELP Annex. B framework. For this reason, this can be clearly different from previous approaches in that the present approach does not require an additional arithmetic step such as the discrete Fourier transform (DFT). Experimental results indicate that the proposed method shows better performance than or at least comparable to conventional approaches with a lower computational burden.

  • Acceleration of Differential Power Analysis through the Parallel Use of GPU and CPU

    Sung Jae LEE  Seog Chung SEO  Dong-Guk HAN  Seokhie HONG  Sangjin LEE  

     
    LETTER-Cryptography and Information Security

      Page(s):
    1688-1692

    This paper proposes methods for accelerating DPA by using the CPU and the GPU in a parallel manner. The overhead of naive DPA evaluation software increases excessively as the number of points in a trace or the number of traces is enlarged due to the rapid increase of file I/O overhead. This paper presents some techniques, with respect to DPA-arithmetic and file handling, which can make the overhead of DPA software become not extreme but gradual as the increase of the amount of trace data to be processed. Through generic experiments, we show that the software, equipped with the proposed methods, using both CPU and GPU can shorten the time for evaluating the DPA resistance of devices by almost half.

  • Extended Single Parity Check Product Codes that Achieve Close-to-Capacity Performance in High Coding Rate

    Akira SHIOZAKI  Masashi KISHIMOTO  Genmon MARUOKA  

     
    LETTER-Coding Theory

      Page(s):
    1693-1696

    This letter proposes extended single parity check product codes and presents their empirical performances on a Gaussian channel by belief propagation (BP) decoding algorithm. The simulation results show that the codes can achieve close-to-capacity performance in high coding rate. The code of length 9603 and of rate 0.96 is only 0.77 dB away from the Shannon limit for a BER of 10-5.

  • Phase Offsets for Binary Sequences Using Order and Index

    Young-Joon SONG  

     
    LETTER-Coding Theory

      Page(s):
    1697-1699

    When a zero offset reference sequence is defined, the i-bit shifted sequence has phase offset i with respect to the reference sequence. In this letter, we propose a new algorithm to compute phase offsets for a periodic binary sequence using the concept of order and index of an integer based on the number theoretical approach. We define an offset evaluation function that is used to calculate the phase offset, and derive properties of the function. Once the function is computed, the phase offset of the sequence is simply obtained by taking the index of it. The new algorithm overcomes the restrictions found in conventional methods on the length and the number of '0's and '1's in binary codes. Its application to the code acquisition is also investigated to show the proposed method is useful.

  • Joint Adaptive Modulation and Power Allocation for Multiuser MIMO Systems with Reduced-Feedback

    Youxiang WANG  Yongwan PARK  

     
    LETTER-Communication Theory and Signals

      Page(s):
    1700-1703

    This paper presents an adaptive modulation and power allocation method for uplink multiuser multiple-input multiple-output systems under the assumption that there is perfect channel information at the receiver but not at the transmitter. The receiver jointly optimizes the power level and modulation order for all users under constraints of transmit power and error requirements, and returns these information to each user via a low-rate feedback channel. Power and modulation optimization maximizes the total throughput under a tolerable bit error ratio for each user. The ellipsoid method is used to design efficient algorithms for optimal power and modulation level.

  • Complexity Suppression of Neural Networks for PAPR Reduction of OFDM Signal

    Masaya OHTA  Keiichi MIZUTANI  Katsumi YAMASHITA  

     
    LETTER-Spread Spectrum Technologies and Applications

      Page(s):
    1704-1708

    In this letter, a neural network (NN) for peak power reduction of an orthogonal frequency-division multiplexing (OFDM) signal is improved in order to suppress its computational complexity. Numerical experiments show that the amount of IFFTs in the proposed NN can be reduced to half, and its computational time can be reduced by 21.5% compared with a conventional NN. In comparison with the SLM, the proposed NN is effective to achieve high PAPR reduction and it has an advantage over the SLM under the equal computational condition.

  • Denoising of Multi-Modal Images with PCA Self-Cross Bilateral Filter

    Yu QIU  Kiichi URAHAMA  

     
    LETTER-Image

      Page(s):
    1709-1712

    We present the PCA self-cross bilateral filter for denoising multi-modal images. We firstly apply the principal component analysis for input multi-modal images. We next smooth the first principal component with a preliminary filter and use it as a supplementary image for cross bilateral filtering of input images. Among some preliminary filters, the undecimated wavelet transform is useful for effective denoising of various multi-modal images such as color, multi-lighting and medical images.