In order to miniaturize a very low-level dc current amplifier and to speed up its output response speed, we proposed to employ the switched-capacitor circuit (SCC) as its negative feedback circuit, instead of the conventionally used high-ohmage resistor. However, in the case of using SCC, the output waveform had unnecessary components. To decrease the effect of these components and to speed up the response speed, we used a switched-capacitor filter (SCF), an offset controller, and a positive feedback circuit. As a result, we demonstrated that it was useful to use the amplifier using the SCC.

For the purpose of analyzing noise characteristics of a very low-level dc current amplifier using a high-ohmage resistor negative feedback circuit, we made some noise sources in the form of the electronic circuit simulation program PSpice with the C language program and simulated transient analyses of the very low-level dc current amplifier using the PSpice. As a result, it was observed that in terms of rise time and increases in the amplitudes of the noise voltage with or without positive feedback circuit, the behavior of output waveform of the simulated equivalent circuit was similar to that of the experimental circuit.

A tunneling magnetoresistive(TMR)-based logic-in- memory circuit, where storage functions are distributed over a logic-circuit plane, is proposed for a low-power VLSI system. Since the TMR device is regarded as a variable resistor with a non-volatile storage capability, any logic functions with external inputs and stored inputs can be performed by using the TMR-based resistor/transistor network. The combination of dynamic current-mode circuitry and a TMR-based logic network makes it possible to perform any switching operations without steady current, which results in power saving. A design example of an SAD unit for MPEG encoding is discussed, and its advantages are demonstrated.

This paper proposes two high-performance multi-threshold-voltage CMOS (MTCMOS) F/Fs that are based on the CMOS hybrid-latch F/F and the CMOS semi-dynamic F/F. The proposed F/Fs utilize a clock-gating technique or a data recovery circuit in order to preserve their logic states in the power-down mode. They can change operation modes whether the clock level is high or low, and they provide outputs to fanouts in the power-down mode. When compared with existing clock-free MTCMOS F/Fs, the proposed MTCMOS hybrid-latch F/F shows maximum reduction of average delay, average power, and average power-delay product by 33%, 46%, and 63% for the supply voltage ranging from 0.8 V to 1.2 V. Although outperformed by the MTCMOS hybrid-latch F/F, the proposed MTCMOS semi-dynamic F/F inherits the benefit of the embedded logic from the CMOS SD F/F. Experimental results indicate that the MTCMOS semi-dynamic F/F can be used to implement a logic circuit that is superior to the one designed using the MTCMOS hybrid-latch F/F in speed, power, and area.

A systolic array is an ideal for ASICs because of its massive parallelism with a minimum communication overhead, regularity and modularity. Most of commercial FPGAs cannot handle systolic structure with fast sampling rate for their general-purpose architecture nature. This paper presents a new PLD architecture targeting a super-systolic array for application-specific arithmetic operations such as MAC. This architecture combines the high performance of ASICs with the flexibility of PLDs and it offers a significant alternative view on the programmable logic devices. The super-systolic array is ideal for a newly proposed PLD architecture when it comes to area-efficiency, P&R and clock speed.

This paper proposes a quantization-based image-quality guaranteed watermarking (IQGW) method using a nonorthogonal discrete wavelet transformation. An IQGW method generates watermarked images of a desired image quality for any image, neither with trial and error nor with image-dependent parameters. To guarantee the image-quality, the proposed method adjusts the energy of the watermark sequence to be embedded based on the relationship between a nonorthogonally transformed domain and the spatial domain for the signal energy. This proposed method extracts the embedded watermark by quantization of watermarked coefficients, no reference image, thus, is required. In addition, it is capable of controlling the objective and subjective image-quality of a watermarked image independently. With features mentioned above, the proposed method is suitable for real-time embedding of Motion JPEG 2000 videos. Moreover, it is able to fuse quantization- and correlation-based watermarking.

In this paper, we propose a hardware architecture of real-time JPEG encoder for 1.4 mega pixels CMOS image sensor SoC which can be applied to mobile communication devices. The proposed architecture has an efficient interface scheme with CMOS image sensor and other peripherals for real-time encoding. The JPEG encoder supports the base-line JPEG mode, and processes motion images of which resolution is up to 1280960 (CCIR601 YCrCb 4:2:2,15 fps) by real-time processing. The JPEG encoder supports 8 types of resolution, and can serve the 4 levels of image quality through quantization matrix. The proposed JPEG encoder can transfer encoded motion pictures and raw image data from CMOS image sensor to external device through USB 2.0 and a compressed still image is stored at external pseudo SRAM through SRAM interface. And proposed core can communicate parameters of encoding type with other host by I2C. The proposed architecture was implemented with VHDL and verified for the functions with Synopsys and Modelsim. The encoder proposed in this paper was fabricated in process of 0.18 µ of Hynix semiconductor Inc.

Many image and video compression algorithms work by splitting the image into blocks and producing variable-length code bits for each block data. If variable-length code data are transmitted consecutively over error-prone channel without any error protection technique, the receiving decoder cannot decode the stream properly. So the standard image and video compression algorithms insert some redundant information into the stream to provide some protection against channel errors. One of such redundancy is resynchronization marker, which enables the decoder to restart the decoding process from a known state in the event of transmission errors, but its frequent use should be restricted not to consume bandwidth too much. The Error Resilient Entropy Code (EREC) is well known method which can regain synchronization without any redundant information. It can work with the overall prefix codes, which many image compression methods use. This paper proposes an improvement to FEREC (Fast Error-Resilient Entropy Coding). It first calculates initial searching position according to bit lengths of consecutive blocks. Second, initial offset is decided using statistical distribution of long and short blocks, and initial offset is adjusted to insure all possible offset value can be examined. The proposed algorithm can speed up the construction of EREC slots, and can preserve compressed image quality in the event of transmission errors. The simulation result shows that the quality of transmitted image is enhanced about 0.3-3.5 dB compared with the existing FEREC when random channel error happens.

In this paper, a new tracking method for Code Shift Keying Spread Spectrum (CSK/SS) is proposed. In the CSK/SS systems, since the transmitted sequences vary at every frame, synchronization is difficult. In the proposed method, a pair consists of the Manchester-coded PN sequence and the non-Manchester-coded PN sequence as the synchronizing sequence. The cross-correlation characteristic of the pair is used instead of the S-curve of delay lock loop (DLL). The receiver can track the signal timing by using the characteristic. The proposed method is applied to the external synchronization system whose structure is simple. The following performance in channel with the Additive White Gaussian Noise (AWGN) is analyzed and evaluated; (1) the tracking error (jitter) performance and (2) the bit error rate (BER) performance that takes the jitter into account. As a result, the jitter of the proposed system is better than those of the conventional DLL systems as E_b/N₀ increases. The jitter of the proposed system has less degradation than those of the conventional systems, even if the number of users increases. Moreover, BER of the proposed system is similar to that of the 1Δ-DLL system and superior to that of the 2Δ-DLL system.

In this paper, the throughput performance of the CSK/SSMA ALOHA system with nonorthogonal sequences which combines the ALOHA system with Code Shift Keying using nonorthogonal sequences is analyzed. In this system, the nonorthogonal sequences are constructed by concatenating M_con orthogonal sequences. The throughput performance of the CSK/SSMA ALOHA system with nonorthogonal sequences is analyzed in consideration that the number of packets changes at intervals of one orthogonal sequence. Moreover, the throughput performance of our system with Channel Load Sensing Protocol (CLSP) is also analyzed. We also examine the influence of unreachable control signal of CLSP. Consequently, it is found that the throughput performance of our system decreases significantly by this analysis. It is also found that the throughput performance of our system improves greatly by using CLSP. However, the unreachable control signal affects the throughput performance of this system, seriously.

This paper presents analysis results on finite-impulse response (FIR) channel estimation used for the equalization in Advanced Television Systems Committee digital television receivers. While channel estimation results have been effectively used for the equalization, the conditions of sufficient order and high signal-to-noise ratio (SNR) were assumed in most cases. To compensate for these unrealistic assumptions, we consider diverse probable conditions for channel estimation, such as reduced order and low SNRs, and then theoretically analyze each estimation case. The analysis shows that the adaptive FIR channel estimator provides an unbiased estimation and matches well its corresponding channel coefficients irrespective of the number of taps of the estimator and the non-causality of the unknown channel. Simulation results verify our analysis on the estimation of terrestrial DTV channels.

In order to control the moving speed of an endoscopic capsule in the human intestine, electrical stimulation method is proposed in this paper. The miniaturized endoscopic capsule with the function of various electrical stimulations has been designed and implemented. An in-vivo animal experiment has been performed to show the ability of controlling the movement speed of the endoscopic capsule according to the level of electrical stimulation. In-vivo experiments were performed by inserting the implemented capsule into a pig's intestinal tract. From the experimental results, the activation of peristaltic movement and the relationship between the moving speed of capsule and the stimulation amplitude could be found. It is shown that the moving speed of capsule in the intestine can be controlled by adjustment of the stimulation level applied in the capsule electrodes. The results of the in-vivo experiment verify that the degree of contraction in the intestinal tract is closely related with the level of stimulating electrical voltage, suggesting that the moving speed of capsule in the human gastrointestinal tract can be controlled by externally adjusting the amplitude of stimulating pulse signal.

Investment planning for power plants involves making a long-term plan covering various facility investments, such as the construction of a new power plant or the replacement of an old plant with a new one, under uncertain environments. In this paper, we propose an optimization method for such a planning problem. Our method is based on decision tree analysis, in which uncertain environments are described as scenarios. The maintenance of existing plants is also taken into account by introducing the option of large-scale repair in addition to replacement. In order to avoid combinatorial explosion of failure event scenarios of plants, we introduce the concept of failure risk cost which contributes to simplification of the decision tree and reduction of the calculation time.

This paper proposes a new change type for dynamic change of workflows, named Selective Shift. Workflow technology is being introduced in many companies. Workflows are business processes that allow for computerized support. The goal of workflow technology is to process workflow instances, called cases, as efficiently as possible. Companies need to change their workflows in order to adapt them to various requirements. Dynamic change is to change workflows having running cases. The most important issue in dynamic change is how running cases should be handled. Ellis et al. and Sadiq et al. have proposed change types that prescribe how to handle running cases. Their change types handle running cases collectively. If a change type can handle running cases separately, the change type would be more flexible and efficient than the conventional change types. However, there is no any change type that can handle running cases separately. Selective Shift to be proposed can handle running cases separately. We first present the concept and definition of Selective Shift. Then we give a method to handle running cases separately. Furthermore we give methods to handle running cases so that dynamic change becomes most efficient on one evaluation measure, called change time. Finally we compare Selective Shift with the conventional change types on change time by using 270 examples of dynamic change.

This paper proposes an enhanced RBF network that enhances learning algorithms between input layer and middle layer and between middle layer and output layer individually for improving the efficiency of learning. The proposed network applies ART2 network as the learning structure between input layer and middle layer. And the auto-tuning method of learning rate and momentum is proposed and applied to learning between middle layer and output layer, which arbitrates learning rate and momentum dynamically by using the fuzzy control system for the arbitration of the connected weight between middle layer and output layer. The experiment for the classification of number patterns extracted from the citizen registration card shows that compared with conventional networks such as delta-bar-delta algorithm and the ART2-based RBF network, the proposed method achieves the improvement of performance in terms of learning speed and convergence.

This paper investigates the usefulness of a new priority list for two-processor scheduling problem of program nets. Firstly, we discuss the weakness of a previously proposed priority list and then introduce a new priority list. Through simulation experiment we show that the new priority list is better than the previous one and can generate the same length of schedules as GA scheduling, which implies the new priority list can generate approximately optimal schedules.

The recent sight system requires high stabilization functions for the longer range of observation and the higher kill probability. To this end, it is necessary to compensate rotational disturbances which are not stabilized with the conventional 2-axes stabilization system. This paper proposes a simple method on the rotational motion estimation for the stabilization of the sight system.

We proposed 3D-mesh watermarking using CEGI distribution that has robustness against mesh simplification, cropping, vertex randomization, and rotation and which does not need the original model for detection the watermark. The proposed algorithm embeds the watermark bits into the normal vector direction of meshes that are mapped into the cells that have the large magnitude of complex weight in patch CEGIs. The watermark can be detected based on the known center point of each patch and the rank table of the cell in each patch instead of original model. Experimental results verified that the proposed algorithm has robustness against the attacks.

A novel image enhancement algorithm that can efficiently detect a small target of panoramic infrared (IR) imagery is proposed. Image enhancement is the first step for detecting and recognizing a small target in the IR imagery. The essence of the proposed algorithm is to utilize the independent histogram equalization (HE) separately over two sub-images obtained by decomposing the given image through the statistical hypothesis testing (SHT). Experimental results show that the proposed algorithm has better discrimination and lower false alarm rate than the conventional algorithms.

In this paper, an algorithm for anchor frame detection in news video is proposed, which consists of four steps. First, the cumulative histogram method is used to detect shot boundaries in order to segment a news video into video shots. Second, skin color information is used to detect face regions in each video shot. Third, color information of upper body regions is used to extract anchor object. Then, a graph-theoretic cluster analysis algorithm is utilized to classify the news video into anchor-person shots and non-anchor shots. Experimental results have shown the effectiveness of the proposed algorithm.

The recognition limit of luminance difference in the human visual system (HVS) has not been studied systematically. In this paper, surround adapted Weber-Fechner fraction is calculated based on the crispening effect. It is found that surround adapted fractions have reduced to 1/3 of the traditional Weber-Fechner fractions. As compared with Breitmeyer's experiments, the presented result is a reasonable one. It can be used as some guide to design the digital display system when a designer needs to decide bit count of digital signal in considering of the limit of brightness level, and as the inspection tool of display manufacturing of brightness smear, defect, and so on.

We present a simple bit allocation scheme based on adaptive coding for MIMO-OFDM (Multiple Input Multiple Output - Orthogonal Frequency Division Multiplexing) systems with V-BLAST (Vertical-Bell laboratories LAyered Space-Time) detector. The proposed scheme controls the code rate of the channel coding and assigns the same modulation and coding to the set of selected sub-channels, which greatly reduces the feedback burden while achieving good performance. Simulation results show that the proposed scheme with minimal feedback provides significant performance improvement over other systems.

We propose a rapid and reliable signal acquisition scheme for UWB (Ultra Wide Band) systems in indoor wireless environments. The proposed scheme is a two-step search with different thresholds and search windows, where each step utilizes the single-dwell search with the bit reversal. Simulation results show that the proposed scheme for the UWB signals can achieve significant reduction of the required mean acquisition time as compared to other schemes including general double-dwell search scheme for various threshold levels. Furthermore, it is also observed that the proposed scheme can achieve much faster and reliable signal acquisition as the first threshold is larger in noisy environments.

Frequency domain blind source separation has the great advantage that the complicated convolution in time domain becomes multiple efficient multiplications in frequency domain. However, the inherent ambiguity of permutation of ICA becomes an important problem that the separated signals at different frequencies may be permuted in order. Mapping the separated signal at each frequency to a target source remains to be a difficult problem. In this paper, we first discuss the inter-frequency correlation based method, and propose a new method using the continuity in power between adjacent frequency components of same source. The proposed method also implicitly utilizes the information of inter-frequency correlation, as such has better performance than the previous method.

A simple high-speed low input impedance CMOS current comparator is presented. The circuit uses improved Wilson current-mirror to perform subtraction. Negative feedback is employed to reduce the input impedance of the circuit. HSPICE is used to verify the circuit performance with standard 0.5 µm CMOS technology. Simulation results demonstrate propagation delay of 1.02 ns, average power consumption of 0.9 mW, and input impedance of 137 Ω for 0.1 µA input current at the supply voltage of 3 V.

This paper presents new encoding methods for the binary genetic algorithm (BGA) and new converting methods for the real-coded genetic algorithm (RCGA). These methods are developed for the specific case in which some parameters have to be searched in wide ranges since their actual values are not known. The oversampling effect which occurs at large values in the wide range search are reduced by adjustment of resolutions in mantissa and exponent of real numbers mapped by BGA. Owing to an intrinsic similarity in chromosomal operations, the proposed encoding methods are also applied to RCGA with remapping (converting as named above) from real numbers generated in RCGA. A simple probabilistic analysis and benchmark with two ill-scaled test functions are carried out. System identification of a simple electrical circuit is also undertaken to testify effectiveness of the proposed methods to real world problems. All the optimization results show that the proposed encoding/converting methods are more suitable for problems with ill-scaled parameters or wide parameter ranges for searching.

In VDSM era, crosstalk is becoming a more and more vital factor in high performance VLSI designs, making noise mitigation in early design stages necessary. In this paper, we propose an effective algorithm optimizing crosstalk under congestion constraint in the layer assignment stage. A new model for noise severity measurement is developed where wire length is used as a scale for the noise immunity, and both capacitive and inductive coupling between sensitive nets are considered. We also take shield insertion into account for further crosstalk mitigation. Experimental results show that our approach could efficiently reduce crosstalk noise without compromising congestion compared to the algorithm proposed in [1].

This paper presents a distributed task assignment algorithm in a logical unidirectional ring, which guarantees that almost all tasks are assigned to servers with the first come first served (FCFS) policy without a global clock. A task assignment for a process is obtained in the time period needed for a message to circle the ring. This time period is almost optimal for a unidirectional ring. The FCFS policy is very important in terms of task fairness and can also avoid starvation and provide an efficient response time. Simulation results show that the algorithm generally works better than conventional task assignment or load balancing schemes with respect to both mean response time and task fairness.

In this paper we show that an outerplanar graph G with maximum degree at most 3 has a 2-D orthogonal drawing with no bends if and only if G contains no triangles. We also show that an outerplanar graph G with maximum degree at most 6 has a 3-D orthogonal drawing with no bends if and only if G contains no triangles.

This paper gives an efficient algorithm to compute addition in Jacobian of C₃₄ curves, aiming at C₃₄ curve cryptosystems. Using C₃₄ curves for cryptosystems has two advantages. The first is safety and the second is the short size of the base field. In the paper, we modify the addition algorithm of for C_ab curves in the specific manner to C₃₄ curves. We classify all of the forms of the Groebner bases of ideals involved in the algorithm and eliminate the use of Buchberger algorithm from it. Our resulting algorithm computes the addition in Jacobian of C₃₄ curves in about 3 times amount of computation of the one in elliptic curves, when the sizes of groups are set to be the same.

A cycle search algorithm based on a message-passing in a Tanner graph is proposed for designing good LDPC codes. By applying the message-passing algorithm with a message alphabet composed of only two messages to a cycle search, we can perform a cycle search with less computational complexity than tree-based search algorithms. Also, the proposed algorithm can be easily implemented by using an existing message-passing decoder and can easily adopt different kind of criteria for an LDPC code design with a slight modification in the node update equations.

Packet-recognition/code-acquisition (PR/CA) is one of the most important issues in packet communication systems. In a CDMA Unslotted ALOHA system, Multiple Access Interference (MAI) may bring about errors in PR/CA. The MAI mainly stems from already recognized packets and newly arriving packets under the execution of PR/CA. This characteristic of asynchronous transmission in CDMA U-ALOHA systems implies that only one or a few packets arrive at the receiver within a short interval of a execution. Furthermore, newly arriving packets are recognized and code-acquired by using a short preamble part. Consequently, the MAI from the packets under the execution of the PR/CA will be small. Focusing on that point, this paper proposes applying the IC scheme in order to suppress the MAI from the already recognized and code-acquired packets. A performance evaluation demonstrates that such an application is valid due to the small amount of MAI from the packets under the execution of PR/CA. In addition, we demonstrates that the scheme reduces false recognition rather than mis-recognition. Such a scheme improves the performance of not only PR/CA, but also the throughput.

This paper describes a new interface for a barge-in free spoken dialogue system combining an adaptive sound field control and a microphone array. In order to actualize robustness against the change of transfer functions due to the various interferences, the barge-in free spoken dialogue system which uses sound field control and a microphone array has been proposed by one of the authors. However, this method cannot follow the change of transfer functions because the method consists of fixed filters. To solve the problem, we introduce a new adaptive sound field control that follows the change of transfer functions.

A speaker identification system based on wavelet transform (WT) derived from codebook design using fuzzy c-mean algorithm (FCM) is proposed. We have combined FCM and the vector quantization (VQ) algorithm to avoid typical local minima for speaker data compression. Identification accuracies of 94% were achieved for 100 Mandarin speakers.

In this letter, two kinds of MOS operational transconductance amplifiers (OTAs) based on combiners are presented. Each OTA has the following advantages; one of the proposed OTAs (OTA-1) can be operated at low supply voltage and the other OTA (OTA-2) has wide bandwidth. Through HSPICE simulations with a standard 0.35 µm CMOS device parameters, the operation under the supply voltage of 1.5 V for OTA-1 and the -3 dB bandwidth of several gigahertz for OTA-2 are confirmed.

We present a method of stabilizing a class of nonlinear systems which are not necessarily feedback linearizable. First, we show a new way of constructing a diffeomorphism to transform a class of nonlinear systems to the feedback linearized form with perturbation. Then, we propose a semi-globally stabilizing control law for nonlinear systems that are connected by a chain of integrator perturbed by arbitrary nonlinear terms. In our approach, we have flexibility in choosing a diffeomorphism where the system is not restricted to involutivity and this leads to reduction in computational burden and flexibility in controller design.

Recently, efficient algorithms have been proposed for finding all characteristic curves of one-port piecewise-linear resistive circuits. Using these algorithms, a middle scale one-port circuit can be represented by a piecewise-linear resistor that is neither voltage nor current controlled. In this letter, an efficient algorithm is proposed for finding all dc operating points of piecewise-linear circuits containing such neither voltage nor current controlled resistors.